Commit 568d850e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv/for-v5.4-rc1-b' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull more RISC-V updates from Paul Walmsley:
 "Some additional RISC-V updates.

  This includes one significant fix:

   - Prevent interrupts from being unconditionally re-enabled during
     exception handling if they were disabled in the context in which
     the exception occurred

  Also a few other fixes:

   - Fix a build error when sparse memory support is manually enabled

   - Prevent CPUs beyond CONFIG_NR_CPUS from being enabled in early boot

  And a few minor improvements:

   - DT improvements: in the FU540 SoC DT files, improve U-Boot
     compatibility by adding an "ethernet0" alias, drop an unnecessary
     property from the DT files, and add support for the PWM device

   - KVM preparation: add a KVM-related macro for future RISC-V KVM
     support, and export some symbols required to build KVM support as
     modules

   - defconfig additions: build more drivers by default for QEMU
     configurations"

* tag 'riscv/for-v5.4-rc1-b' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Avoid interrupts being erroneously enabled in handle_exception()
  riscv: dts: sifive: Drop "clock-frequency" property of cpu nodes
  riscv: dts: sifive: Add ethernet0 to the aliases node
  RISC-V: Export kernel symbols for kvm
  KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface
  arch/riscv: disable excess harts before picking main boot hart
  RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig
  RISC-V: Fix building error when CONFIG_SPARSEMEM_MANUAL=y
  riscv: dts: Add DT support for SiFive FU540 PWM driver
parents 70570a64 c82dd6d0

arch/riscv/boot/dts/sifive/fu540-c000.dtsi

+19 −3
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
	aliases {

		serial0 = &uart0;

		serial1 = &uart1;

		ethernet0 = &eth0;

	};



	chosen {
@@ -60,7 +61,6 @@ 
			};

		};

		cpu2: cpu@2 {

			clock-frequency = <0>;

			compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";

			d-cache-block-size = <64>;

			d-cache-sets = <64>;
@@ -84,7 +84,6 @@ 
			};

		};

		cpu3: cpu@3 {

			clock-frequency = <0>;

			compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";

			d-cache-block-size = <64>;

			d-cache-sets = <64>;
@@ -108,7 +107,6 @@ 
			};

		};

		cpu4: cpu@4 {

			clock-frequency = <0>;

			compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";

			d-cache-block-size = <64>;

			d-cache-sets = <64>;
@@ -230,6 +228,24 @@ 
			#size-cells = <0>;

			status = "disabled";

		};

		pwm0: pwm@10020000 {

			compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";

			reg = <0x0 0x10020000 0x0 0x1000>;

			interrupt-parent = <&plic0>;

			interrupts = <42 43 44 45>;

			clocks = <&prci PRCI_CLK_TLCLK>;

			#pwm-cells = <3>;

			status = "disabled";

		};

		pwm1: pwm@10021000 {

			compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";

			reg = <0x0 0x10021000 0x0 0x1000>;

			interrupt-parent = <&plic0>;

			interrupts = <46 47 48 49>;

			clocks = <&prci PRCI_CLK_TLCLK>;

			#pwm-cells = <3>;

			status = "disabled";

		};



	};

};

arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts

+8 −0
Original line number Diff line number Diff line
@@ -85,3 +85,11 @@ 
		reg = <0>;

	};

};



&pwm0 {

	status = "okay";

};



&pwm1 {

	status = "okay";

};

arch/riscv/configs/defconfig

+11 −0
Original line number Diff line number Diff line
@@ -29,6 +29,8 @@ CONFIG_IP_PNP_DHCP=y 
CONFIG_IP_PNP_BOOTP=y

CONFIG_IP_PNP_RARP=y

CONFIG_NETLINK_DIAG=y

CONFIG_NET_9P=y

CONFIG_NET_9P_VIRTIO=y

CONFIG_PCI=y

CONFIG_PCIEPORTBUS=y

CONFIG_PCI_HOST_GENERIC=y
@@ -39,6 +41,7 @@ CONFIG_BLK_DEV_LOOP=y 
CONFIG_VIRTIO_BLK=y

CONFIG_BLK_DEV_SD=y

CONFIG_BLK_DEV_SR=y

CONFIG_SCSI_VIRTIO=y

CONFIG_ATA=y

CONFIG_SATA_AHCI=y

CONFIG_SATA_AHCI_PLATFORM=y
@@ -54,6 +57,7 @@ CONFIG_SERIAL_8250_CONSOLE=y 
CONFIG_SERIAL_OF_PLATFORM=y

CONFIG_SERIAL_EARLYCON_RISCV_SBI=y

CONFIG_HVC_RISCV_SBI=y

CONFIG_VIRTIO_CONSOLE=y

CONFIG_HW_RANDOM=y

CONFIG_HW_RANDOM_VIRTIO=y

CONFIG_SPI=y
@@ -61,6 +65,7 @@ CONFIG_SPI_SIFIVE=y 
# CONFIG_PTP_1588_CLOCK is not set

CONFIG_DRM=y

CONFIG_DRM_RADEON=y

CONFIG_DRM_VIRTIO_GPU=y

CONFIG_FRAMEBUFFER_CONSOLE=y

CONFIG_USB=y

CONFIG_USB_XHCI_HCD=y
@@ -73,7 +78,12 @@ CONFIG_USB_STORAGE=y 
CONFIG_USB_UAS=y

CONFIG_MMC=y

CONFIG_MMC_SPI=y

CONFIG_VIRTIO_PCI=y

CONFIG_VIRTIO_BALLOON=y

CONFIG_VIRTIO_INPUT=y

CONFIG_VIRTIO_MMIO=y

CONFIG_RPMSG_CHAR=y

CONFIG_RPMSG_VIRTIO=y

CONFIG_EXT4_FS=y

CONFIG_EXT4_FS_POSIX_ACL=y

CONFIG_AUTOFS4_FS=y
@@ -86,6 +96,7 @@ CONFIG_NFS_V4=y 
CONFIG_NFS_V4_1=y

CONFIG_NFS_V4_2=y

CONFIG_ROOT_NFS=y

CONFIG_9P_FS=y

CONFIG_CRYPTO_USER_API_HASH=y

CONFIG_CRYPTO_DEV_VIRTIO=y

CONFIG_PRINTK_TIME=y

arch/riscv/configs/rv32_defconfig

+11 −0
Original line number Diff line number Diff line
@@ -29,6 +29,8 @@ CONFIG_IP_PNP_DHCP=y 
CONFIG_IP_PNP_BOOTP=y

CONFIG_IP_PNP_RARP=y

CONFIG_NETLINK_DIAG=y

CONFIG_NET_9P=y

CONFIG_NET_9P_VIRTIO=y

CONFIG_PCI=y

CONFIG_PCIEPORTBUS=y

CONFIG_PCI_HOST_GENERIC=y
@@ -39,6 +41,7 @@ CONFIG_BLK_DEV_LOOP=y 
CONFIG_VIRTIO_BLK=y

CONFIG_BLK_DEV_SD=y

CONFIG_BLK_DEV_SR=y

CONFIG_SCSI_VIRTIO=y

CONFIG_ATA=y

CONFIG_SATA_AHCI=y

CONFIG_SATA_AHCI_PLATFORM=y
@@ -54,11 +57,13 @@ CONFIG_SERIAL_8250_CONSOLE=y 
CONFIG_SERIAL_OF_PLATFORM=y

CONFIG_SERIAL_EARLYCON_RISCV_SBI=y

CONFIG_HVC_RISCV_SBI=y

CONFIG_VIRTIO_CONSOLE=y

CONFIG_HW_RANDOM=y

CONFIG_HW_RANDOM_VIRTIO=y

# CONFIG_PTP_1588_CLOCK is not set

CONFIG_DRM=y

CONFIG_DRM_RADEON=y

CONFIG_DRM_VIRTIO_GPU=y

CONFIG_FRAMEBUFFER_CONSOLE=y

CONFIG_USB=y

CONFIG_USB_XHCI_HCD=y
@@ -69,7 +74,12 @@ CONFIG_USB_OHCI_HCD=y 
CONFIG_USB_OHCI_HCD_PLATFORM=y

CONFIG_USB_STORAGE=y

CONFIG_USB_UAS=y

CONFIG_VIRTIO_PCI=y

CONFIG_VIRTIO_BALLOON=y

CONFIG_VIRTIO_INPUT=y

CONFIG_VIRTIO_MMIO=y

CONFIG_RPMSG_CHAR=y

CONFIG_RPMSG_VIRTIO=y

CONFIG_SIFIVE_PLIC=y

CONFIG_EXT4_FS=y

CONFIG_EXT4_FS_POSIX_ACL=y
@@ -83,6 +93,7 @@ CONFIG_NFS_V4=y 
CONFIG_NFS_V4_1=y

CONFIG_NFS_V4_2=y

CONFIG_ROOT_NFS=y

CONFIG_9P_FS=y

CONFIG_CRYPTO_USER_API_HASH=y

CONFIG_CRYPTO_DEV_VIRTIO=y

CONFIG_PRINTK_TIME=y

arch/riscv/include/asm/pgtable.h

+12 −12
Original line number Diff line number Diff line
@@ -83,6 +83,18 @@ extern pgd_t swapper_pg_dir[]; 
#define __S110	PAGE_SHARED_EXEC

#define __S111	PAGE_SHARED_EXEC



#define VMALLOC_SIZE     (KERN_VIRT_SIZE >> 1)

#define VMALLOC_END      (PAGE_OFFSET - 1)

#define VMALLOC_START    (PAGE_OFFSET - VMALLOC_SIZE)



#define FIXADDR_TOP      VMALLOC_START

#ifdef CONFIG_64BIT

#define FIXADDR_SIZE     PMD_SIZE

#else

#define FIXADDR_SIZE     PGDIR_SIZE

#endif

#define FIXADDR_START    (FIXADDR_TOP - FIXADDR_SIZE)



/*

 * Roughly size the vmemmap space to be large enough to fit enough

 * struct pages to map half the virtual address space. Then
@@ -424,18 +436,6 @@ extern void *dtb_early_va; 
extern void setup_bootmem(void);

extern void paging_init(void);



#define VMALLOC_SIZE     (KERN_VIRT_SIZE >> 1)

#define VMALLOC_END      (PAGE_OFFSET - 1)

#define VMALLOC_START    (PAGE_OFFSET - VMALLOC_SIZE)



#define FIXADDR_TOP      VMALLOC_START

#ifdef CONFIG_64BIT

#define FIXADDR_SIZE     PMD_SIZE

#else

#define FIXADDR_SIZE     PGDIR_SIZE

#endif

#define FIXADDR_START    (FIXADDR_TOP - FIXADDR_SIZE)



/*

 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.

 * Note that PGDIR_SIZE must evenly divide TASK_SIZE.

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