Commit 568180a5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 

Pull MIPS fixes from Ralf Baechle:
 "A fair number of fixes across the field.  Nothing terribly
  complicated; the one liners in below changelog should be fairly
  descriptive.

  Noteworthy is the SB1 change which the result of changes to binutils
  resulting in one big gas warning for most files being assembled as
  well as the asid_cache and branch emulation fixes which fix corruption
  or possible uninteded behaviour of kernel or application code.  The
  remainder of fixes are more platforms or subsystem specific"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: R46000: Fix Micro-assembler field overflow for R4600 V2
  MIPS: ptrace: Avoid smp_processor_id() in preemptible code
  MIPS: Lemote 2F: cs5536: mfgpt: use raw locks
  MIPS: SB1: Fix excessive kernel warnings.
  MIPS: RC32434: fix broken PCI resource initialization
  MIPS: malta: memory.c: Initialize the 'memsize' variable
  MIPS: Fix typo when reporting cache and ftlb errors for ImgTec cores
  MIPS: Fix inconsistancy of __NR_Linux_syscalls value
  MIPS: Fix branch emulation of branch likely instructions.
  MIPS: Fix a typo error in AUDIT_ARCH definition
  MIPS: Change type of asid_cache to unsigned long
parents 32439700 f3f0d951

arch/mips/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -151,7 +151,7 @@ cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \ 
			-Wa,--trap

cflags-$(CONFIG_CPU_RM7000)	+= $(call cc-option,-march=rm7000,-march=r5000) \

			-Wa,--trap

cflags-$(CONFIG_CPU_SB1)	+= $(call cc-option,-march=sb1,-march=r5000) \

cflags-$(CONFIG_CPU_SB1)	+= $(call cc-option,-march=sb1 -mno-mdmx -mno-mips3d,-march=r5000) \

			-Wa,--trap

cflags-$(CONFIG_CPU_R8000)	+= -march=r8000 -Wa,--trap

cflags-$(CONFIG_CPU_R10000)	+= $(call cc-option,-march=r10000,-march=r8000) \

arch/mips/include/asm/cpu-info.h

+2 −2
Original line number Diff line number Diff line
@@ -39,14 +39,14 @@ struct cache_desc { 
#define MIPS_CACHE_PINDEX	0x00000020	/* Physically indexed cache */



struct cpuinfo_mips {

	unsigned int		udelay_val;

	unsigned int		asid_cache;

	unsigned long		asid_cache;



	/*

	 * Capability and feature descriptor structure for MIPS CPU

	 */

	unsigned long		options;

	unsigned long		ases;

	unsigned int		udelay_val;

	unsigned int		processor_id;

	unsigned int		fpu_id;

	unsigned int		msa_id;

arch/mips/include/uapi/asm/unistd.h

+3 −3
Original line number Diff line number Diff line
@@ -381,7 +381,7 @@ 
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */



#define __NR_O32_Linux			4000

#define __NR_O32_Linux_syscalls		350

#define __NR_O32_Linux_syscalls		351



#if _MIPS_SIM == _MIPS_SIM_ABI64
@@ -710,7 +710,7 @@ 
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */



#define __NR_64_Linux			5000

#define __NR_64_Linux_syscalls		310

#define __NR_64_Linux_syscalls		311



#if _MIPS_SIM == _MIPS_SIM_NABI32
@@ -1043,6 +1043,6 @@ 
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */



#define __NR_N32_Linux			6000

#define __NR_N32_Linux_syscalls		314

#define __NR_N32_Linux_syscalls		315



#endif /* _UAPI_ASM_UNISTD_H */

arch/mips/kernel/branch.c

+4 −4
Original line number Diff line number Diff line
@@ -317,7 +317,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, 
		if (regs->regs[insn.i_format.rs] ==

		    regs->regs[insn.i_format.rt]) {

			epc = epc + 4 + (insn.i_format.simmediate << 2);

			if (insn.i_format.rt == beql_op)

			if (insn.i_format.opcode == beql_op)

				ret = BRANCH_LIKELY_TAKEN;

		} else

			epc += 8;
@@ -329,7 +329,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, 
		if (regs->regs[insn.i_format.rs] !=

		    regs->regs[insn.i_format.rt]) {

			epc = epc + 4 + (insn.i_format.simmediate << 2);

			if (insn.i_format.rt == bnel_op)

			if (insn.i_format.opcode == bnel_op)

				ret = BRANCH_LIKELY_TAKEN;

		} else

			epc += 8;
@@ -341,7 +341,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, 
		/* rt field assumed to be zero */

		if ((long)regs->regs[insn.i_format.rs] <= 0) {

			epc = epc + 4 + (insn.i_format.simmediate << 2);

			if (insn.i_format.rt == bnel_op)

			if (insn.i_format.opcode == blezl_op)

				ret = BRANCH_LIKELY_TAKEN;

		} else

			epc += 8;
@@ -353,7 +353,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, 
		/* rt field assumed to be zero */

		if ((long)regs->regs[insn.i_format.rs] > 0) {

			epc = epc + 4 + (insn.i_format.simmediate << 2);

			if (insn.i_format.rt == bnel_op)

			if (insn.i_format.opcode == bgtzl_op)

				ret = BRANCH_LIKELY_TAKEN;

		} else

			epc += 8;

arch/mips/kernel/ptrace.c

+7 −7
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ int ptrace_get_watch_regs(struct task_struct *child, 
	enum pt_watch_style style;

	int i;



	if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0)

	if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)

		return -EIO;

	if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))

		return -EIO;
@@ -177,14 +177,14 @@ int ptrace_get_watch_regs(struct task_struct *child, 
#endif



	__put_user(style, &addr->style);

	__put_user(current_cpu_data.watch_reg_use_cnt,

	__put_user(boot_cpu_data.watch_reg_use_cnt,

		   &addr->WATCH_STYLE.num_valid);

	for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {

	for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {

		__put_user(child->thread.watch.mips3264.watchlo[i],

			   &addr->WATCH_STYLE.watchlo[i]);

		__put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,

			   &addr->WATCH_STYLE.watchhi[i]);

		__put_user(current_cpu_data.watch_reg_masks[i],

		__put_user(boot_cpu_data.watch_reg_masks[i],

			   &addr->WATCH_STYLE.watch_masks[i]);

	}

	for (; i < 8; i++) {
@@ -204,12 +204,12 @@ int ptrace_set_watch_regs(struct task_struct *child, 
	unsigned long lt[NUM_WATCH_REGS];

	u16 ht[NUM_WATCH_REGS];



	if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0)

	if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)

		return -EIO;

	if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))

		return -EIO;

	/* Check the values. */

	for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {

	for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {

		__get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);

#ifdef CONFIG_32BIT

		if (lt[i] & __UA_LIMIT)
@@ -228,7 +228,7 @@ int ptrace_set_watch_regs(struct task_struct *child, 
			return -EINVAL;

	}

	/* Install them. */

	for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {

	for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {

		if (lt[i] & 7)

			watch_active = 1;

		child->thread.watch.mips3264.watchlo[i] = lt[i];

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