Commit 56571507 authored by Manu Abraham's avatar Manu Abraham Committed by Mauro Carvalho Chehab
Browse files

V4L/DVB (11582): stv090x: fix Undocumented Registers 



Signed-off-by: default avatarManu Abraham <manu@linuxtv.org>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 017eb038

drivers/media/dvb/frontends/stv090x.c

+20 −4
Original line number Diff line number Diff line
@@ -176,8 +176,10 @@ static const struct stv090x_tab stv090x_rf_tab[] = { 
static struct stv090x_reg stv0900_initval[] = {



	{ STV090x_OUTCFG,		0x00 },

	{ STV090x_MODECFG,		0xff },

	{ STV090x_AGCRF1CFG,		0x11 },

	{ STV090x_AGCRF2CFG,		0x13 },

	{ STV090x_TSGENERAL1X,		0x14 },

	{ STV090x_TSTTNR2,		0x21 },

	{ STV090x_TSTTNR4,		0x21 },

	{ STV090x_P2_DISTXCTL,		0x22 },
@@ -203,8 +205,10 @@ static struct stv090x_reg stv0900_initval[] = { 
	{ STV090x_P2_ERRCTRL2,		0xc1 },

	{ STV090x_P2_CFRICFG,		0xf8 },

	{ STV090x_P2_NOSCFG,		0x1c },

	{ STV090x_P2_DMDTOM,		0x20 },

	{ STV090x_P2_CORRELMANT,	0x70 },

	{ STV090x_P2_CORRELABS,		0x88 },

	{ STV090x_P2_AGC2O,		0x5b },

	{ STV090x_P2_AGC2REF,		0x38 },

	{ STV090x_P2_CARCFG,		0xe4 },

	{ STV090x_P2_ACLC,		0x1A },
@@ -246,6 +250,7 @@ static struct stv090x_reg stv0900_initval[] = { 
	{ STV090x_P1_DMDCFGMD,		0xf9 },

	{ STV090x_P1_DEMOD,		0x08 },

	{ STV090x_P1_DMDCFG3,		0xc4 },

	{ STV090x_P1_DMDTOM,		0x20 },

	{ STV090x_P1_CARFREQ,		0xed },

	{ STV090x_P1_LDT,		0xd0 },

	{ STV090x_P1_LDT2,		0xb8 },
@@ -265,6 +270,7 @@ static struct stv090x_reg stv0900_initval[] = { 
	{ STV090x_P1_NOSCFG,		0x1c },

	{ STV090x_P1_CORRELMANT,	0x70 },

	{ STV090x_P1_CORRELABS,		0x88 },

	{ STV090x_P1_AGC2O,		0x5b },

	{ STV090x_P1_AGC2REF,		0x38 },

	{ STV090x_P1_CARCFG,		0xe4 },

	{ STV090x_P1_ACLC,		0x1A },
@@ -326,6 +332,7 @@ static struct stv090x_reg stv0900_initval[] = { 
	{ STV090x_GAINLLR_NF15,		0x1A },

	{ STV090x_GAINLLR_NF16,		0x1F },

	{ STV090x_GAINLLR_NF17,		0x21 },

	{ STV090x_RCCFGH,		0x20 },

	{ STV090x_P1_FECM,		0x01 }, /* disable DSS modes */

	{ STV090x_P2_FECM,		0x01 }, /* disable DSS modes */

	{ STV090x_P1_PRVIT,		0x2F }, /* disable PR 6/7 */
@@ -364,8 +371,10 @@ static struct stv090x_reg stv0903_initval[] = { 
	{ STV090x_P1_ERRCTRL2,		0xc1 },

	{ STV090x_P1_CFRICFG,		0xf8 },

	{ STV090x_P1_NOSCFG,		0x1c },

	{ STV090x_P1_DMDTOM,		0x20 },

	{ STV090x_P1_CORRELMANT,	0x70 },

	{ STV090x_P1_CORRELABS,		0x88 },

	{ STV090x_P1_AGC2O,		0x5b },

	{ STV090x_P1_AGC2REF,		0x38 },

	{ STV090x_P1_CARCFG,		0xe4 },

	{ STV090x_P1_ACLC,		0x1A },
@@ -427,6 +436,7 @@ static struct stv090x_reg stv0903_initval[] = { 
	{ STV090x_GAINLLR_NF15,		0x1A },

	{ STV090x_GAINLLR_NF16,		0x1F },

	{ STV090x_GAINLLR_NF17,		0x21 },

	{ STV090x_RCCFGH,		0x20 },

	{ STV090x_P1_FECM,		0x01 }, /*disable the DSS mode */

	{ STV090x_P1_PRVIT,		0x2f }  /*disable puncture rate 6/7*/

};
@@ -434,6 +444,7 @@ static struct stv090x_reg stv0903_initval[] = { 
static struct stv090x_reg stv0900_cut20_val[] = {



	{ STV090x_P2_DMDCFG3,		0xe8 },

	{ STV090x_P2_DMDCFG4,		0x10 },

	{ STV090x_P2_CARFREQ,		0x38 },

	{ STV090x_P2_CARHDR,		0x20 },

	{ STV090x_P2_KREFTMG,		0x5a },
@@ -442,6 +453,7 @@ static struct stv090x_reg stv0900_cut20_val[] = { 
	{ STV090x_P2_SMAPCOEF5,		0x04 },

	{ STV090x_P2_NOSCFG,		0x0c },

	{ STV090x_P1_DMDCFG3,		0xe8 },

	{ STV090x_P1_DMDCFG4,		0x10 },

	{ STV090x_P1_CARFREQ,		0x38 },

	{ STV090x_P1_CARHDR,		0x20 },

	{ STV090x_P1_KREFTMG,		0x5a },
@@ -467,6 +479,7 @@ static struct stv090x_reg stv0900_cut20_val[] = { 


static struct stv090x_reg stv0903_cut20_val[] = {

	{ STV090x_P1_DMDCFG3,		0xe8 },

	{ STV090x_P1_DMDCFG4,		0x10 },

	{ STV090x_P1_CARFREQ,		0x38 },

	{ STV090x_P1_CARHDR,		0x20 },

	{ STV090x_P1_KREFTMG,		0x5a },
@@ -640,11 +653,9 @@ static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 d 
static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)

{

	struct stv090x_state *state = fe->demodulator_priv;

	const struct stv090x_config *config = state->config;

	u32 reg;



	reg = STV090x_READ_DEMOD(state, I2CRPT);

//	STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);

	if (enable) {

		dprintk(FE_DEBUG, 1, "Enable Gate");

		STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
@@ -3605,10 +3616,12 @@ static int stv090x_set_tspath(struct stv090x_state *state) 
			case STV090x_TSMODE_SERIAL_PUNCTURED:

			case STV090x_TSMODE_SERIAL_CONTINUOUS:

			default:

				stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);

				break;



			case STV090x_TSMODE_PARALLEL_PUNCTURED:

			case STV090x_TSMODE_DVBCI:

				stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);

				reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);

				STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);

				if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
@@ -3632,10 +3645,12 @@ static int stv090x_set_tspath(struct stv090x_state *state) 
			case STV090x_TSMODE_SERIAL_PUNCTURED:

			case STV090x_TSMODE_SERIAL_CONTINUOUS:

			default:

				stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);

				break;



			case STV090x_TSMODE_PARALLEL_PUNCTURED:

			case STV090x_TSMODE_DVBCI:

				stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);

				break;

			}

			break;
@@ -3893,6 +3908,7 @@ struct dvb_frontend *stv090x_attach(const struct stv090x_config *config, 
	state->i2c				= i2c;

	state->frontend.ops			= stv090x_ops;

	state->frontend.demodulator_priv	= state;

	state->demod				= demod;

	state->demod_mode 			= config->demod_mode; /* Single or Dual mode */

	state->device				= config->device;

	state->rolloff				= 35; /* default */

drivers/media/dvb/frontends/stv090x_reg.h

+44 −25
Original line number Diff line number Diff line
@@ -48,6 +48,8 @@ 
#define STV090x_OFFST_OUTPARRS3_HZ_FIELD	3

#define STV090x_WIDTH_OUTPARRS3_HZ_FIELD	1



#define STV090x_MODECFG				0xf11d



#define STV090x_IRQSTATUS3			0xf120

#define STV090x_OFFST_SPLL_LOCK_FIELD		5

#define STV090x_WIDTH_SPLL_LOCK_FIELD		1
@@ -571,8 +573,8 @@ 
#define STV090x_WIDTH_FSKR_CARLOSS_THRESH_FIELD	8



#define STV090x_Px_DISTXCTL(__x)		(0xF1A0 - (__x - 1) * 0x10)

#define STV090x_P1_DISTXCTL			(1)

#define STV090x_P2_DISTXCTL			(2)

#define STV090x_P1_DISTXCTL			STV090x_Px_DISTXCTL(1)

#define STV090x_P2_DISTXCTL			STV090x_Px_DISTXCTL(2)

#define STV090x_OFFST_Px_TIM_OFF_FIELD		7

#define STV090x_WIDTH_Px_TIM_OFF_FIELD		1

#define STV090x_OFFST_Px_DISEQC_RESET_FIELD	6
@@ -585,8 +587,8 @@ 
#define STV090x_WIDTH_Px_DISTX_MODE_FIELD	3



#define STV090x_Px_DISRXCTL(__x)		(0xf1a1 - (__x - 1) * 0x10)

#define STV090x_P1_DISRXCTL			(1)

#define STV090x_P2_DISRXCTL			(2)

#define STV090x_P1_DISRXCTL			STV090x_Px_DISRXCTL(1)

#define STV090x_P2_DISRXCTL			STV090x_Px_DISRXCTL(2)

#define STV090x_OFFST_Px_RECEIVER_ON_FIELD	7

#define STV090x_WIDTH_Px_RECEIVER_ON_FIELD	1

#define STV090x_OFFST_Px_IGNO_SHORT22K_FIELD	6
@@ -603,8 +605,8 @@ 
#define STV090x_WIDTH_Px_IRQ_4NBYTES_FIELD	1



#define STV090x_Px_DISRX_ST0(__x)		(0xf1a4 - (__x - 1) * 0x10)

#define STV090x_P1_DISRX_ST0			(1)

#define STV090x_P2_DISRX_ST0			(2)

#define STV090x_P1_DISRX_ST0			STV090x_Px_DISRX_ST0(1)

#define STV090x_P2_DISRX_ST0			STV090x_Px_DISRX_ST0(2)

#define STV090x_OFFST_Px_RX_END_FIELD		7

#define STV090x_WIDTH_Px_RX_END_FIELD		1

#define STV090x_OFFST_Px_RX_ACTIVE_FIELD	6
@@ -621,8 +623,8 @@ 
#define STV090x_WIDTH_Px_ABORT_DISRX_FIELD	1



#define STV090x_Px_DISRX_ST1(__x)		(0xf1a5 - (__x - 1) * 0x10)

#define STV090x_P1_DISRX_ST1			(1)

#define STV090x_P2_DISRX_ST1			(2)

#define STV090x_P1_DISRX_ST1			STV090x_Px_DISRX_ST1(1)

#define STV090x_P2_DISRX_ST1			STV090x_Px_DISRX_ST1(2)

#define STV090x_OFFST_Px_RX_FAIL_FIELD		7

#define STV090x_WIDTH_Px_RX_FAIL_FIELD		1

#define STV090x_OFFST_Px_FIFO_PARITYFAIL_FIELD	6
@@ -635,20 +637,20 @@ 
#define STV090x_WIDTH_Px_FIFO_BYTENBR_FIELD	4



#define STV090x_Px_DISRXDATA(__x)		(0xf1a6 - (__x - 1) * 0x10)

#define STV090x_P1_DISRXDATA			(1)

#define STV090x_P2_DISRXDATA			(2)

#define STV090x_P1_DISRXDATA			STV090x_Px_DISRXDATA(1)

#define STV090x_P2_DISRXDATA			STV090x_Px_DISRXDATA(2)

#define STV090x_OFFST_Px_DISRX_DATA_FIELD	0

#define STV090x_WIDTH_Px_DISRX_DATA_FIELD	8



#define STV090x_Px_DISTXDATA(__x)		(0xf1a7 - (__x - 1) * 0x10)

#define STV090x_P1_DISTXDATA			(1)

#define STV090x_P2_DISTXDATA			(2)

#define STV090x_P1_DISTXDATA			STV090x_Px_DISTXDATA(1)

#define STV090x_P2_DISTXDATA			STV090x_Px_DISTXDATA(2)

#define STV090x_OFFST_Px_DISEQC_FIFO_FIELD	0

#define STV090x_WIDTH_Px_DISEQC_FIFO_FIELD	8



#define STV090x_Px_DISTXSTATUS(__x)		(0xf1a8 - (__x - 1) * 0x10)

#define STV090x_P1_DISTXSTATUS			(1)

#define STV090x_P2_DISTXSTATUS			(2)

#define STV090x_P1_DISTXSTATUS			STV090x_Px_DISTXSTATUS(1)

#define STV090x_P2_DISTXSTATUS			STV090x_Px_DISTXSTATUS(2)

#define STV090x_OFFST_Px_TX_FAIL_FIELD		7

#define STV090x_WIDTH_Px_TX_FAIL_FIELD		1

#define STV090x_OFFST_Px_FIFO_FULL_FIELD	6
@@ -661,26 +663,26 @@ 
#define STV090x_WIDTH_Px_TXFIFO_BYTES_FIELD	4



#define STV090x_Px_F22TX(__x)			(0xf1a9 - (__x - 1) * 0x10)

#define STV090x_P1_F22TX			(1)

#define STV090x_P2_F22TX			(2)

#define STV090x_P1_F22TX			STV090x_Px_F22TX(1)

#define STV090x_P2_F22TX			STV090x_Px_F22TX(2)

#define STV090x_OFFST_Px_F22_REG_FIELD		0

#define STV090x_WIDTH_Px_F22_REG_FIELD		8



#define STV090x_Px_F22RX(__x)			(0xf1aa - (__x - 1) * 0x10)

#define STV090x_P1_F22RX			(1)

#define STV090x_P2_F22RX			(2)

#define STV090x_P1_F22RX			STV090x_Px_F22RX(1)

#define STV090x_P2_F22RX			STV090x_Px_F22RX(2)

#define STV090x_OFFST_Px_F22RX_REG_FIELD	0

#define STV090x_WIDTH_Px_F22RX_REG_FIELD	8



#define STV090x_Px_ACRPRESC(__x)		(0xf1ac - (__x - 1) * 0x10)

#define STV090x_P1_ACRPRESC			(1)

#define STV090x_P2_ACRPRESC			(2)

#define STV090x_P1_ACRPRESC			STV090x_Px_ACRPRESC(1)

#define STV090x_P2_ACRPRESC			STV090x_Px_ACRPRESC(2)

#define STV090x_OFFST_Px_ACR_PRESC_FIELD	0

#define STV090x_WIDTH_Px_ACR_PRESC_FIELD	3



#define STV090x_Px_ACRDIV(__x)			(0xf1ad - (__x - 1) * 0x10)

#define STV090x_P1_ACRDIV			(1)

#define STV090x_P2_ACRDIV			(2)

#define STV090x_P1_ACRDIV			STV090x_Px_ACRDIV(1)

#define STV090x_P2_ACRDIV			STV090x_Px_ACRDIV(2)

#define STV090x_OFFST_Px_ACR_DIV_FIELD		0

#define STV090x_WIDTH_Px_ACR_DIV_FIELD		8
@@ -892,6 +894,10 @@ 
#define STV090x_OFFST_Px_NOSTOP_FIFOFULL_FIELD	3

#define STV090x_WIDTH_Px_NOSTOP_FIFOFULL_FIELD	1



#define STV090x_Px_DMDCFG4(__x)			(0xf41f - (__x - 1) * 0x200)

#define STV090x_P1_DMDCFG4			STV090x_Px_DMDCFG4(1)

#define STV090x_P2_DMDCFG4			STV090x_Px_DMDCFG4(2)



#define STV090x_Px_CORRELMANT(__x)		(0xF420 - (__x - 1) * 0x200)

#define STV090x_P1_CORRELMANT			STV090x_Px_CORRELMANT(1)

#define STV090x_P2_CORRELMANT			STV090x_Px_CORRELMANT(2)
@@ -922,6 +928,14 @@ 
#define STV090x_OFFST_Px_PLH_TYPE_FIELD		0

#define STV090x_WIDTH_Px_PLH_TYPE_FIELD		2



#define STV090x_Px_AGCK32(__x)			(0xf42b - (__x - 1) * 0x200)

#define STV090x_P1_AGCK32			STV090x_Px_AGCK32(1)

#define STV090x_P2_AGCK32			STV090x_Px_AGCK32(2)



#define STV090x_Px_AGC2O(__x)			(0xF42C - (__x - 1) * 0x200)

#define STV090x_P1_AGC2O			STV090x_Px_AGC2O(1)

#define STV090x_P2_AGC2O			STV090x_Px_AGC2O(2)



#define STV090x_Px_AGC2REF(__x)			(0xF42D - (__x - 1) * 0x200)

#define STV090x_P1_AGC2REF			STV090x_Px_AGC2REF(1)

#define STV090x_P2_AGC2REF			STV090x_Px_AGC2REF(2)
@@ -2281,12 +2295,17 @@ 
#define STV090x_OFFST_Px_FSPYBER_CTIME_FIELD		0

#define STV090x_WIDTH_Px_FSPYBER_CTIME_FIELD		3



#define STV090x_RCCFGH					0xf600



#define STV090x_TSGENERAL				0xF630

#define STV090x_OFFST_Px_MUXSTREAM_OUT_FIELD		3

#define STV090x_WIDTH_Px_MUXSTREAM_OUT_FIELD		1

#define STV090x_OFFST_Px_TSFIFO_PERMPARAL_FIELD		1

#define STV090x_WIDTH_Px_TSFIFO_PERMPARAL_FIELD		2



#define STV090x_TSGENERAL1X				0xf670

#define STV090x_CFGEXT					0xfa80



#define STV090x_TSTRES0					0xFF11

#define STV090x_OFFST_FRESFEC_FIELD			7

#define STV090x_WIDTH_FRESFEC_FIELD			1

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