Commit 564ef853 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'juno-updates-5.8' of... 

Merge tag 'juno-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt

ARMv8 Juno/Vexpress/Fast Models updates for v5.8

Various miscellaneous device tree source fixes to make them fully
binding compliant. It includes fixing various device node names,
order of interrupt properties, compatible names, address and size
cell fields and their aligment with children nodes as well as
moving some fixed devices out of bus node.

* tag 'juno-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: Fix SCPI shared mem node name
  arm64: dts: vexpress: Fix VExpress LED names
  arm64: dts: juno: Fix GPU interrupt order
  arm64: dts: fvp/juno: Fix bus node names
  arm64: dts: fvp: Fix SMMU DT node
  arm64: dts: fvp/juno: Fix serial node names
  arm64: dts: juno: Use proper DT node name for USB
  arm64: dts: fvp: Fix ITS node names and #msi-cells
  arm64: dts: fvp: Fix GIC child nodes
  arm64: dts: juno: Fix GIC child nodes
  arm64: dts: fvp: Fix GIC compatible names
  arm64: dts: juno: Fix mem-timer
  arm64: dts: juno: Move fixed devices out of bus node
  arm64: dts: fvp: Move fixed clocks out of bus node
  arm64: dts: vexpress: Move fixed devices out of bus node
  arm64: dts: fvp: Move fixed devices out of bus node
  arm64: dts: fvp/juno: Fix node address fields

Link: https://lore.kernel.org/r/20200519094702.GA32975@bogus


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 430640a6 94cc3f1b

arch/arm/boot/dts/vexpress-v2m-rs1.dtsi

+164 −164
Original line number Diff line number Diff line
@@ -19,8 +19,162 @@ 
 */



/ {

	v2m_fixed_3v3: fixed-regulator-0 {

		compatible = "regulator-fixed";

		regulator-name = "3V3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-always-on;

	};



	v2m_clk24mhz: clk24mhz {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <24000000>;

		clock-output-names = "v2m:clk24mhz";

	};



	v2m_refclk1mhz: refclk1mhz {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <1000000>;

		clock-output-names = "v2m:refclk1mhz";

	};



	v2m_refclk32khz: refclk32khz {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <32768>;

		clock-output-names = "v2m:refclk32khz";

	};



	leds {

		compatible = "gpio-leds";



		led-1 {

			label = "v2m:green:user1";

			gpios = <&v2m_led_gpios 0 0>;

			linux,default-trigger = "heartbeat";

		};



		led-2 {

			label = "v2m:green:user2";

			gpios = <&v2m_led_gpios 1 0>;

			linux,default-trigger = "disk-activity";

		};



		led-3 {

			label = "v2m:green:user3";

			gpios = <&v2m_led_gpios 2 0>;

			linux,default-trigger = "cpu0";

		};



		led-4 {

			label = "v2m:green:user4";

			gpios = <&v2m_led_gpios 3 0>;

			linux,default-trigger = "cpu1";

		};



		led-5 {

			label = "v2m:green:user5";

			gpios = <&v2m_led_gpios 4 0>;

			linux,default-trigger = "cpu2";

		};



		led-6 {

			label = "v2m:green:user6";

			gpios = <&v2m_led_gpios 5 0>;

			linux,default-trigger = "cpu3";

		};



		led-7 {

			label = "v2m:green:user7";

			gpios = <&v2m_led_gpios 6 0>;

			linux,default-trigger = "cpu4";

		};



		led-8 {

			label = "v2m:green:user8";

			gpios = <&v2m_led_gpios 7 0>;

			linux,default-trigger = "cpu5";

		};

	};



	mcc {

		compatible = "arm,vexpress,config-bus";

		arm,vexpress,config-bridge = <&v2m_sysreg>;



		oscclk0 {

			/* MCC static memory clock */

			compatible = "arm,vexpress-osc";

			arm,vexpress-sysreg,func = <1 0>;

			freq-range = <25000000 60000000>;

			#clock-cells = <0>;

			clock-output-names = "v2m:oscclk0";

		};



		v2m_oscclk1: oscclk1 {

			/* CLCD clock */

			compatible = "arm,vexpress-osc";

			arm,vexpress-sysreg,func = <1 1>;

			freq-range = <23750000 65000000>;

			#clock-cells = <0>;

			clock-output-names = "v2m:oscclk1";

		};



		v2m_oscclk2: oscclk2 {

			/* IO FPGA peripheral clock */

			compatible = "arm,vexpress-osc";

			arm,vexpress-sysreg,func = <1 2>;

			freq-range = <24000000 24000000>;

			#clock-cells = <0>;

			clock-output-names = "v2m:oscclk2";

		};



		volt-vio {

			/* Logic level voltage */

			compatible = "arm,vexpress-volt";

			arm,vexpress-sysreg,func = <2 0>;

			regulator-name = "VIO";

			regulator-always-on;

			label = "VIO";

		};



		temp-mcc {

			/* MCC internal operating temperature */

			compatible = "arm,vexpress-temp";

			arm,vexpress-sysreg,func = <4 0>;

			label = "MCC";

		};



		reset {

			compatible = "arm,vexpress-reset";

			arm,vexpress-sysreg,func = <5 0>;

		};



		muxfpga {

			compatible = "arm,vexpress-muxfpga";

			arm,vexpress-sysreg,func = <7 0>;

		};



		shutdown {

			compatible = "arm,vexpress-shutdown";

			arm,vexpress-sysreg,func = <8 0>;

		};



		reboot {

			compatible = "arm,vexpress-reboot";

			arm,vexpress-sysreg,func = <9 0>;

		};



		dvimode {

			compatible = "arm,vexpress-dvimode";

			arm,vexpress-sysreg,func = <11 0>;

		};

	};



	bus@8000000 {

		motherboard {

		motherboard-bus {

			model = "V2M-P1";

			arm,hbi = <0x190>;

			arm,vexpress,site = <0>;
@@ -31,7 +185,7 @@ 
			#interrupt-cells = <1>;

			ranges;



			nor_flash: flash@0,00000000 {

			nor_flash: flash@0 {

				compatible = "arm,vexpress-flash", "cfi-flash";

				reg = <0 0x00000000 0x04000000>,

				      <4 0x00000000 0x04000000>;
@@ -41,13 +195,13 @@ 
				};

			};



			psram@1,00000000 {

			psram@100000000 {

				compatible = "arm,vexpress-psram", "mtd-ram";

				reg = <1 0x00000000 0x02000000>;

				bank-width = <4>;

			};



			ethernet@2,02000000 {

			ethernet@202000000 {

				compatible = "smsc,lan9118", "smsc,lan9115";

				reg = <2 0x02000000 0x10000>;

				interrupts = <15>;
@@ -59,14 +213,14 @@ 
				vddvario-supply = <&v2m_fixed_3v3>;

			};



			usb@2,03000000 {

			usb@203000000 {

				compatible = "nxp,usb-isp1761";

				reg = <2 0x03000000 0x20000>;

				interrupts = <16>;

				port1-otg;

			};



			iofpga@3,00000000 {

			iofpga-bus@300000000 {

				compatible = "simple-bus";

				#address-cells = <1>;

				#size-cells = <1>;
@@ -162,7 +316,7 @@ 
					clock-names = "KMIREFCLK", "apb_pclk";

				};



				v2m_serial0: uart@90000 {

				v2m_serial0: serial@90000 {

					compatible = "arm,pl011", "arm,primecell";

					reg = <0x090000 0x1000>;

					interrupts = <5>;
@@ -170,7 +324,7 @@ 
					clock-names = "uartclk", "apb_pclk";

				};



				v2m_serial1: uart@a0000 {

				v2m_serial1: serial@a0000 {

					compatible = "arm,pl011", "arm,primecell";

					reg = <0x0a0000 0x1000>;

					interrupts = <6>;
@@ -178,7 +332,7 @@ 
					clock-names = "uartclk", "apb_pclk";

				};



				v2m_serial2: uart@b0000 {

				v2m_serial2: serial@b0000 {

					compatible = "arm,pl011", "arm,primecell";

					reg = <0x0b0000 0x1000>;

					interrupts = <7>;
@@ -186,7 +340,7 @@ 
					clock-names = "uartclk", "apb_pclk";

				};



				v2m_serial3: uart@c0000 {

				v2m_serial3: serial@c0000 {

					compatible = "arm,pl011", "arm,primecell";

					reg = <0x0c0000 0x1000>;

					interrupts = <8>;
@@ -282,160 +436,6 @@ 
					};

				};

			};



			v2m_fixed_3v3: fixed-regulator-0 {

				compatible = "regulator-fixed";

				regulator-name = "3V3";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

			};



			v2m_clk24mhz: clk24mhz {

				compatible = "fixed-clock";

				#clock-cells = <0>;

				clock-frequency = <24000000>;

				clock-output-names = "v2m:clk24mhz";

			};



			v2m_refclk1mhz: refclk1mhz {

				compatible = "fixed-clock";

				#clock-cells = <0>;

				clock-frequency = <1000000>;

				clock-output-names = "v2m:refclk1mhz";

			};



			v2m_refclk32khz: refclk32khz {

				compatible = "fixed-clock";

				#clock-cells = <0>;

				clock-frequency = <32768>;

				clock-output-names = "v2m:refclk32khz";

			};



			leds {

				compatible = "gpio-leds";



				user1 {

					label = "v2m:green:user1";

					gpios = <&v2m_led_gpios 0 0>;

					linux,default-trigger = "heartbeat";

				};



				user2 {

					label = "v2m:green:user2";

					gpios = <&v2m_led_gpios 1 0>;

					linux,default-trigger = "mmc0";

				};



				user3 {

					label = "v2m:green:user3";

					gpios = <&v2m_led_gpios 2 0>;

					linux,default-trigger = "cpu0";

				};



				user4 {

					label = "v2m:green:user4";

					gpios = <&v2m_led_gpios 3 0>;

					linux,default-trigger = "cpu1";

				};



				user5 {

					label = "v2m:green:user5";

					gpios = <&v2m_led_gpios 4 0>;

					linux,default-trigger = "cpu2";

				};



				user6 {

					label = "v2m:green:user6";

					gpios = <&v2m_led_gpios 5 0>;

					linux,default-trigger = "cpu3";

				};



				user7 {

					label = "v2m:green:user7";

					gpios = <&v2m_led_gpios 6 0>;

					linux,default-trigger = "cpu4";

				};



				user8 {

					label = "v2m:green:user8";

					gpios = <&v2m_led_gpios 7 0>;

					linux,default-trigger = "cpu5";

				};

			};



			mcc {

				compatible = "arm,vexpress,config-bus";

				arm,vexpress,config-bridge = <&v2m_sysreg>;



				oscclk0 {

					/* MCC static memory clock */

					compatible = "arm,vexpress-osc";

					arm,vexpress-sysreg,func = <1 0>;

					freq-range = <25000000 60000000>;

					#clock-cells = <0>;

					clock-output-names = "v2m:oscclk0";

				};



				v2m_oscclk1: oscclk1 {

					/* CLCD clock */

					compatible = "arm,vexpress-osc";

					arm,vexpress-sysreg,func = <1 1>;

					freq-range = <23750000 65000000>;

					#clock-cells = <0>;

					clock-output-names = "v2m:oscclk1";

				};



				v2m_oscclk2: oscclk2 {

					/* IO FPGA peripheral clock */

					compatible = "arm,vexpress-osc";

					arm,vexpress-sysreg,func = <1 2>;

					freq-range = <24000000 24000000>;

					#clock-cells = <0>;

					clock-output-names = "v2m:oscclk2";

				};



				volt-vio {

					/* Logic level voltage */

					compatible = "arm,vexpress-volt";

					arm,vexpress-sysreg,func = <2 0>;

					regulator-name = "VIO";

					regulator-always-on;

					label = "VIO";

				};



				temp-mcc {

					/* MCC internal operating temperature */

					compatible = "arm,vexpress-temp";

					arm,vexpress-sysreg,func = <4 0>;

					label = "MCC";

				};



				reset {

					compatible = "arm,vexpress-reset";

					arm,vexpress-sysreg,func = <5 0>;

				};



				muxfpga {

					compatible = "arm,vexpress-muxfpga";

					arm,vexpress-sysreg,func = <7 0>;

				};



				shutdown {

					compatible = "arm,vexpress-shutdown";

					arm,vexpress-sysreg,func = <8 0>;

				};



				reboot {

					compatible = "arm,vexpress-reboot";

					arm,vexpress-sysreg,func = <9 0>;

				};



				dvimode {

					compatible = "arm,vexpress-dvimode";

					arm,vexpress-sysreg,func = <11 0>;

				};

			};

		};

	};

};

arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -6,9 +6,9 @@ 


/ {

	gic: interrupt-controller@2c001000 {

		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";

		compatible = "arm,gic-400", "arm,cortex-a15-gic";

		#interrupt-cells = <3>;

		#address-cells = <2>;

		#address-cells = <1>;

		interrupt-controller;

		reg = <0x0 0x2c001000 0 0x1000>,

		      <0x0 0x2c002000 0 0x2000>,

arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi

+6 −5
Original line number Diff line number Diff line
@@ -8,9 +8,9 @@ 
	gic: interrupt-controller@2f000000 {

		compatible = "arm,gic-v3";

		#interrupt-cells = <3>;

		#address-cells = <2>;

		#size-cells = <2>;

		ranges;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x0 0x0 0x2f000000 0x100000>;

		interrupt-controller;

		reg =	<0x0 0x2f000000 0x0 0x10000>,

			<0x0 0x2f100000 0x0 0x200000>,
@@ -19,10 +19,11 @@ 
			<0x0 0x2c02f000 0x0 0x2000>;

		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;



		its: its@2f020000 {

		its: msi-controller@2f020000 {

			compatible = "arm,gic-v3-its";

			msi-controller;

			reg = <0x0 0x2f020000 0x0 0x20000>;

			#msi-cells = <1>;

			reg = <0x20000 0x20000>;

		};

	};

};

arch/arm64/boot/dts/arm/foundation-v8.dtsi

+71 −71
Original line number Diff line number Diff line
@@ -92,71 +92,6 @@ 
		timeout-sec = <30>;

	};



	bus@8000000 {

		compatible = "arm,vexpress,v2m-p1", "simple-bus";

		arm,v2m-memory-map = "rs1";

		#address-cells = <2>; /* SMB chipselect number and offset */

		#size-cells = <1>;



		ranges = <0 0 0 0x08000000 0x04000000>,

			 <1 0 0 0x14000000 0x04000000>,

			 <2 0 0 0x18000000 0x04000000>,

			 <3 0 0 0x1c000000 0x04000000>,

			 <4 0 0 0x0c000000 0x04000000>,

			 <5 0 0 0x10000000 0x04000000>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 63>;

		interrupt-map = <0 0  0 &gic 0 0 GIC_SPI  0 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  1 &gic 0 0 GIC_SPI  1 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  2 &gic 0 0 GIC_SPI  2 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  3 &gic 0 0 GIC_SPI  3 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  4 &gic 0 0 GIC_SPI  4 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  5 &gic 0 0 GIC_SPI  5 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  6 &gic 0 0 GIC_SPI  6 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  7 &gic 0 0 GIC_SPI  7 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  8 &gic 0 0 GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  9 &gic 0 0 GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 10 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 11 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 12 &gic 0 0 GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 13 &gic 0 0 GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 14 &gic 0 0 GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 15 &gic 0 0 GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 16 &gic 0 0 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 17 &gic 0 0 GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 18 &gic 0 0 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 19 &gic 0 0 GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 20 &gic 0 0 GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 21 &gic 0 0 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 22 &gic 0 0 GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 23 &gic 0 0 GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 24 &gic 0 0 GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 25 &gic 0 0 GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 26 &gic 0 0 GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 27 &gic 0 0 GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 28 &gic 0 0 GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 29 &gic 0 0 GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 30 &gic 0 0 GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 31 &gic 0 0 GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 32 &gic 0 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 33 &gic 0 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 34 &gic 0 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 35 &gic 0 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 36 &gic 0 0 GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 37 &gic 0 0 GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 38 &gic 0 0 GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 39 &gic 0 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 40 &gic 0 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;



		ethernet@2,02000000 {

			compatible = "smsc,lan91c111";

			reg = <2 0x02000000 0x10000>;

			interrupts = <15>;

		};



	v2m_clk24mhz: clk24mhz {

		compatible = "fixed-clock";

		#clock-cells = <0>;
@@ -178,7 +113,72 @@ 
		clock-output-names = "v2m:refclk32khz";

	};



		iofpga@3,00000000 {

	bus@8000000 {

		compatible = "arm,vexpress,v2m-p1", "simple-bus";

		arm,v2m-memory-map = "rs1";

		#address-cells = <2>; /* SMB chipselect number and offset */

		#size-cells = <1>;



		ranges = <0 0 0 0x08000000 0x04000000>,

			 <1 0 0 0x14000000 0x04000000>,

			 <2 0 0 0x18000000 0x04000000>,

			 <3 0 0 0x1c000000 0x04000000>,

			 <4 0 0 0x0c000000 0x04000000>,

			 <5 0 0 0x10000000 0x04000000>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 63>;

		interrupt-map = <0 0  0 &gic 0 GIC_SPI  0 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  1 &gic 0 GIC_SPI  1 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  2 &gic 0 GIC_SPI  2 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  3 &gic 0 GIC_SPI  3 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  4 &gic 0 GIC_SPI  4 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  5 &gic 0 GIC_SPI  5 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  6 &gic 0 GIC_SPI  6 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  7 &gic 0 GIC_SPI  7 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  8 &gic 0 GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,

				<0 0  9 &gic 0 GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 10 &gic 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 11 &gic 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 12 &gic 0 GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 13 &gic 0 GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 14 &gic 0 GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 15 &gic 0 GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 16 &gic 0 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 17 &gic 0 GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 18 &gic 0 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 19 &gic 0 GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 20 &gic 0 GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 21 &gic 0 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 22 &gic 0 GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 23 &gic 0 GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 24 &gic 0 GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 25 &gic 0 GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 26 &gic 0 GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 27 &gic 0 GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 28 &gic 0 GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 29 &gic 0 GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 30 &gic 0 GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 31 &gic 0 GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 32 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 33 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 34 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 35 &gic 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 36 &gic 0 GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 37 &gic 0 GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 38 &gic 0 GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 39 &gic 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 40 &gic 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 41 &gic 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 42 &gic 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;



		ethernet@202000000 {

			compatible = "smsc,lan91c111";

			reg = <2 0x02000000 0x10000>;

			interrupts = <15>;

		};



		iofpga-bus@300000000 {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;
@@ -189,7 +189,7 @@ 
				reg = <0x010000 0x1000>;

			};



			v2m_serial0: uart@90000 {

			v2m_serial0: serial@90000 {

				compatible = "arm,pl011", "arm,primecell";

				reg = <0x090000 0x1000>;

				interrupts = <5>;
@@ -197,7 +197,7 @@ 
				clock-names = "uartclk", "apb_pclk";

			};



			v2m_serial1: uart@a0000 {

			v2m_serial1: serial@a0000 {

				compatible = "arm,pl011", "arm,primecell";

				reg = <0x0a0000 0x1000>;

				interrupts = <6>;
@@ -205,7 +205,7 @@ 
				clock-names = "uartclk", "apb_pclk";

			};



			v2m_serial2: uart@b0000 {

			v2m_serial2: serial@b0000 {

				compatible = "arm,pl011", "arm,primecell";

				reg = <0x0b0000 0x1000>;

				interrupts = <7>;
@@ -213,7 +213,7 @@ 
				clock-names = "uartclk", "apb_pclk";

			};



			v2m_serial3: uart@c0000 {

			v2m_serial3: serial@c0000 {

				compatible = "arm,pl011", "arm,primecell";

				reg = <0x0c0000 0x1000>;

				interrupts = <8>;

arch/arm64/boot/dts/arm/fvp-base-revc.dts

+5 −5
Original line number Diff line number Diff line
@@ -126,7 +126,7 @@ 
		      <0x0 0x2c02f000 0 0x2000>;	// GICV

		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;



		its: its@2f020000 {

		its: msi-controller@2f020000 {

			#msi-cells = <1>;

			compatible = "arm,gic-v3-its";

			reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
@@ -172,14 +172,14 @@ 
		dma-coherent;

	};



	smmu: smmu@2b400000 {

	smmu: iommu@2b400000 {

		compatible = "arm,smmu-v3";

		reg = <0x0 0x2b400000 0x0 0x100000>;

		interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>,

			     <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,

			     <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>,

			     <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>,

			     <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>;

		interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";

			     <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>;

		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";

		dma-coherent;

		#iommu-cells = <1>;

		msi-parent = <&its 0x10000>;

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