Commit 562ad8ad authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Implement display WA #1142:kbl,cfl,cml 



Implement display w/a #1142. This supposedly fixes some underruns
with FBC+VTd. Bspec says we should use the same programming regardless
of circumstances. Apparently we should flip the magic bits before
turning on any planes so let's put this into the early w/as.

Cc: Lee Shawn C <shawn.c.lee@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200924194810.10293-1-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
parent 0dbacc89

drivers/gpu/drm/i915/display/intel_display.c

+9 −0
Original line number Diff line number Diff line
@@ -18904,6 +18904,15 @@ static void intel_early_display_was(struct drm_i915_private *dev_priv) 
		intel_de_write(dev_priv, CHICKEN_PAR1_1,

			       intel_de_read(dev_priv, CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);

	}









	if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv)) {









		/* Display WA #1142:kbl,cfl,cml */









		intel_de_rmw(dev_priv, CHICKEN_PAR1_1,









			     KBL_ARB_FILL_SPARE_22, KBL_ARB_FILL_SPARE_22);









		intel_de_rmw(dev_priv, CHICKEN_MISC_2,









			     KBL_ARB_FILL_SPARE_13 | KBL_ARB_FILL_SPARE_14,









			     KBL_ARB_FILL_SPARE_14);









	}









}

















static void ibx_sanitize_pch_hdmi_port(struct drm_i915_private *dev_priv,

























drivers/gpu/drm/i915/i915_reg.h



+3
−0






























Original line number
Diff line number
Diff line







@@ -7866,6 +7866,7 @@ enum {







# define CHICKEN3_DGMG_DONE_FIX_DISABLE		(1 << 2)



















#define CHICKEN_PAR1_1			_MMIO(0x42080)









#define  KBL_ARB_FILL_SPARE_22		REG_BIT(22)









#define  DIS_RAM_BYPASS_PSR2_MAN_TRACK	(1 << 16)









#define  SKL_DE_COMPRESSED_HASH_MODE	(1 << 15)









#define  DPA_MASK_VBLANK_SRD		(1 << 15)








@@ -7878,6 +7879,8 @@ enum {

















#define CHICKEN_MISC_2		_MMIO(0x42084)









#define  CNL_COMP_PWR_DOWN	(1 << 23)









#define  KBL_ARB_FILL_SPARE_14	REG_BIT(14)









#define  KBL_ARB_FILL_SPARE_13	REG_BIT(13)









#define  GLK_CL2_PWR_DOWN	(1 << 12)









#define  GLK_CL1_PWR_DOWN	(1 << 11)









#define  GLK_CL0_PWR_DOWN	(1 << 10)


































































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