Commit 55a042b3 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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soc/tegra: fuse: Fix reading registers using DMA on Tegra20



FUSE driver doesn't configure DMA channel properly, because of it DMA
transfer is never issued and tegra20_fuse_read() always return 0x0.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Acked-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent c641ec6e
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+1 −0
Original line number Diff line number Diff line
@@ -135,6 +135,7 @@ static int tegra_fuse_probe(struct platform_device *pdev)

	/* take over the memory region from the early initialization */
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	fuse->phys = res->start;
	fuse->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(fuse->base))
		return PTR_ERR(fuse->base);
+3 −1
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@ static u32 tegra20_fuse_read(struct tegra_fuse *fuse, unsigned int offset)

	mutex_lock(&fuse->apbdma.lock);

	fuse->apbdma.config.src_addr = fuse->apbdma.phys + FUSE_BEGIN + offset;
	fuse->apbdma.config.src_addr = fuse->phys + FUSE_BEGIN + offset;

	err = dmaengine_slave_config(fuse->apbdma.chan, &fuse->apbdma.config);
	if (err)
@@ -119,6 +119,8 @@ static int tegra20_fuse_probe(struct tegra_fuse *fuse)
	fuse->apbdma.config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
	fuse->apbdma.config.src_maxburst = 1;
	fuse->apbdma.config.dst_maxburst = 1;
	fuse->apbdma.config.direction = DMA_DEV_TO_MEM;
	fuse->apbdma.config.device_fc = false;

	init_completion(&fuse->apbdma.wait);
	mutex_init(&fuse->apbdma.lock);