Commit 558daf69 authored by Dongjiu Geng's avatar Dongjiu Geng Committed by Catalin Marinas
Browse files

KVM: arm64: Emulate RAS error registers and set HCR_EL2's TERR & TEA 



ARMv8.2 adds a new bit HCR_EL2.TEA which routes synchronous external
aborts to EL2, and adds a trap control bit HCR_EL2.TERR which traps
all Non-secure EL1&0 error record accesses to EL2.

This patch enables the two bits for the guest OS, guaranteeing that
KVM takes external aborts and traps attempts to access the physical
error registers.

ERRIDR_EL1 advertises the number of error records, we return
zero meaning we can treat all the other registers as RAZ/WI too.

Signed-off-by: default avatarDongjiu Geng <gengdongjiu@huawei.com>
[removed specific emulation, use trap_raz_wi() directly for everything,
 rephrased parts of the commit message]
Signed-off-by: default avatarJames Morse <james.morse@arm.com>
Reviewed-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 0067df41

arch/arm64/include/asm/kvm_arm.h

+2 −0
Original line number Diff line number Diff line
@@ -23,6 +23,8 @@ 
#include <asm/types.h>



/* Hyp Configuration Register (HCR) bits */

#define HCR_TEA		(UL(1) << 37)

#define HCR_TERR	(UL(1) << 36)

#define HCR_E2H		(UL(1) << 34)

#define HCR_ID		(UL(1) << 33)

#define HCR_CD		(UL(1) << 32)

arch/arm64/include/asm/kvm_emulate.h

+7 −0
Original line number Diff line number Diff line
@@ -50,6 +50,13 @@ static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu) 
	vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS;

	if (is_kernel_in_hyp_mode())

		vcpu->arch.hcr_el2 |= HCR_E2H;

	if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN)) {

		/* route synchronous external abort exceptions to EL2 */

		vcpu->arch.hcr_el2 |= HCR_TEA;

		/* trap error record accesses */

		vcpu->arch.hcr_el2 |= HCR_TERR;

	}



	if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features))

		vcpu->arch.hcr_el2 &= ~HCR_RW;

}

arch/arm64/include/asm/sysreg.h

+10 −0
Original line number Diff line number Diff line
@@ -176,6 +176,16 @@ 
#define SYS_AFSR0_EL1			sys_reg(3, 0, 5, 1, 0)

#define SYS_AFSR1_EL1			sys_reg(3, 0, 5, 1, 1)

#define SYS_ESR_EL1			sys_reg(3, 0, 5, 2, 0)



#define SYS_ERRIDR_EL1			sys_reg(3, 0, 5, 3, 0)

#define SYS_ERRSELR_EL1			sys_reg(3, 0, 5, 3, 1)

#define SYS_ERXFR_EL1			sys_reg(3, 0, 5, 4, 0)

#define SYS_ERXCTLR_EL1			sys_reg(3, 0, 5, 4, 1)

#define SYS_ERXSTATUS_EL1		sys_reg(3, 0, 5, 4, 2)

#define SYS_ERXADDR_EL1			sys_reg(3, 0, 5, 4, 3)

#define SYS_ERXMISC0_EL1		sys_reg(3, 0, 5, 5, 0)

#define SYS_ERXMISC1_EL1		sys_reg(3, 0, 5, 5, 1)



#define SYS_FAR_EL1			sys_reg(3, 0, 6, 0, 0)

#define SYS_PAR_EL1			sys_reg(3, 0, 7, 4, 0)

arch/arm64/kvm/sys_regs.c

+10 −0
Original line number Diff line number Diff line
@@ -1159,6 +1159,16 @@ static const struct sys_reg_desc sys_reg_descs[] = { 
	{ SYS_DESC(SYS_AFSR0_EL1), access_vm_reg, reset_unknown, AFSR0_EL1 },

	{ SYS_DESC(SYS_AFSR1_EL1), access_vm_reg, reset_unknown, AFSR1_EL1 },

	{ SYS_DESC(SYS_ESR_EL1), access_vm_reg, reset_unknown, ESR_EL1 },



	{ SYS_DESC(SYS_ERRIDR_EL1), trap_raz_wi },

	{ SYS_DESC(SYS_ERRSELR_EL1), trap_raz_wi },

	{ SYS_DESC(SYS_ERXFR_EL1), trap_raz_wi },

	{ SYS_DESC(SYS_ERXCTLR_EL1), trap_raz_wi },

	{ SYS_DESC(SYS_ERXSTATUS_EL1), trap_raz_wi },

	{ SYS_DESC(SYS_ERXADDR_EL1), trap_raz_wi },

	{ SYS_DESC(SYS_ERXMISC0_EL1), trap_raz_wi },

	{ SYS_DESC(SYS_ERXMISC1_EL1), trap_raz_wi },



	{ SYS_DESC(SYS_FAR_EL1), access_vm_reg, reset_unknown, FAR_EL1 },

	{ SYS_DESC(SYS_PAR_EL1), NULL, reset_unknown, PAR_EL1 },

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