Commit 556e2f60 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 

Pull clk fixes from Stephen Boyd:
 "A handful of clk driver fixes and one core framework fix

   - Do a DT/firmware lookup in clk_core_get() even when the DT index is
     a nonsensical value

   - Fix some clk data typos in the Amlogic DT headers/code

   - Avoid returning junk in the TI clk driver when an invalid clk is
     looked for

   - Fix dividers for the emac clks on Stratix10 SoCs

   - Fix default HDA rates on Tegra210 to correct distorted audio"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: socfpga: stratix10: fix divider entry for the emac clocks
  clk: Do a DT parent lookup even when index < 0
  clk: tegra210: Fix default rates for HDA clocks
  clk: ti: clkctrl: Fix returning uninitialized data
  clk: meson: meson8b: fix a typo in the VPU parent names array variable
  clk: meson: fix MPLL 50M binding id typo
parents 65ee21eb 74684cce

drivers/clk/clk.c

+1 −1
Original line number Diff line number Diff line
@@ -368,7 +368,7 @@ static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index) 
	const char *dev_id = dev ? dev_name(dev) : NULL;

	struct device_node *np = core->of_node;



	if (np && index >= 0)

	if (np && (name || index >= 0))

		hw = of_clk_get_hw(np, index, name);



	/*

drivers/clk/meson/g12a.c

+2 −2
Original line number Diff line number Diff line
@@ -2734,8 +2734,8 @@ static struct clk_hw_onecell_data g12a_hw_onecell_data = { 
		[CLKID_MALI_1_DIV]		= &g12a_mali_1_div.hw,

		[CLKID_MALI_1]			= &g12a_mali_1.hw,

		[CLKID_MALI]			= &g12a_mali.hw,

		[CLKID_MPLL_5OM_DIV]		= &g12a_mpll_50m_div.hw,

		[CLKID_MPLL_5OM]		= &g12a_mpll_50m.hw,

		[CLKID_MPLL_50M_DIV]		= &g12a_mpll_50m_div.hw,

		[CLKID_MPLL_50M]		= &g12a_mpll_50m.hw,

		[CLKID_SYS_PLL_DIV16_EN]	= &g12a_sys_pll_div16_en.hw,

		[CLKID_SYS_PLL_DIV16]		= &g12a_sys_pll_div16.hw,

		[CLKID_CPU_CLK_DYN0_SEL]	= &g12a_cpu_clk_premux0.hw,

drivers/clk/meson/g12a.h

+1 −1
Original line number Diff line number Diff line
@@ -166,7 +166,7 @@ 
#define CLKID_HDMI_DIV				167

#define CLKID_MALI_0_DIV			170

#define CLKID_MALI_1_DIV			173

#define CLKID_MPLL_5OM_DIV			176

#define CLKID_MPLL_50M_DIV			176

#define CLKID_SYS_PLL_DIV16_EN			178

#define CLKID_SYS_PLL_DIV16			179

#define CLKID_CPU_CLK_DYN0_SEL			180

drivers/clk/meson/meson8b.c

+5 −5
Original line number Diff line number Diff line
@@ -1761,7 +1761,7 @@ static struct clk_regmap meson8m2_gp_pll = { 
	},

};



static const char * const mmeson8b_vpu_0_1_parent_names[] = {

static const char * const meson8b_vpu_0_1_parent_names[] = {

	"fclk_div4", "fclk_div3", "fclk_div5", "fclk_div7"

};
@@ -1778,8 +1778,8 @@ static struct clk_regmap meson8b_vpu_0_sel = { 
	.hw.init = &(struct clk_init_data){

		.name = "vpu_0_sel",

		.ops = &clk_regmap_mux_ops,

		.parent_names = mmeson8b_vpu_0_1_parent_names,

		.num_parents = ARRAY_SIZE(mmeson8b_vpu_0_1_parent_names),

		.parent_names = meson8b_vpu_0_1_parent_names,

		.num_parents = ARRAY_SIZE(meson8b_vpu_0_1_parent_names),

		.flags = CLK_SET_RATE_PARENT,

	},

};
@@ -1837,8 +1837,8 @@ static struct clk_regmap meson8b_vpu_1_sel = { 
	.hw.init = &(struct clk_init_data){

		.name = "vpu_1_sel",

		.ops = &clk_regmap_mux_ops,

		.parent_names = mmeson8b_vpu_0_1_parent_names,

		.num_parents = ARRAY_SIZE(mmeson8b_vpu_0_1_parent_names),

		.parent_names = meson8b_vpu_0_1_parent_names,

		.num_parents = ARRAY_SIZE(meson8b_vpu_0_1_parent_names),

		.flags = CLK_SET_RATE_PARENT,

	},

};

drivers/clk/socfpga/clk-s10.c

+2 −2
Original line number Diff line number Diff line
@@ -103,9 +103,9 @@ static const struct stratix10_perip_cnt_clock s10_main_perip_cnt_clks[] = { 
	{ STRATIX10_NOC_CLK, "noc_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux),

	  0, 0, 0, 0x3C, 1},

	{ STRATIX10_EMAC_A_FREE_CLK, "emaca_free_clk", NULL, emaca_free_mux, ARRAY_SIZE(emaca_free_mux),

	  0, 0, 4, 0xB0, 0},

	  0, 0, 2, 0xB0, 0},

	{ STRATIX10_EMAC_B_FREE_CLK, "emacb_free_clk", NULL, emacb_free_mux, ARRAY_SIZE(emacb_free_mux),

	  0, 0, 4, 0xB0, 1},

	  0, 0, 2, 0xB0, 1},

	{ STRATIX10_EMAC_PTP_FREE_CLK, "emac_ptp_free_clk", NULL, emac_ptp_free_mux,

	  ARRAY_SIZE(emac_ptp_free_mux), 0, 0, 4, 0xB0, 2},

	{ STRATIX10_GPIO_DB_FREE_CLK, "gpio_db_free_clk", NULL, gpio_db_free_mux,

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