Revert "convert SLB miss handlers to C" and subsequent commits (54be0b9c) · Commits · 戴 / test

arch/powerpc/include/asm/asm-prototypes.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -78,8 +78,6 @@ void kernel_bad_stack(struct pt_regs *regs);
		void system_reset_exception(struct pt_regs *regs);
		void machine_check_exception(struct pt_regs *regs);
		void emulation_assist_interrupt(struct pt_regs *regs);
		long do_slb_fault(struct pt_regs *regs, unsigned long ea);
		void do_bad_slb_fault(struct pt_regs *regs, unsigned long ea, long err);

		/* signals, syscalls and interrupts */
		long sys_swapcontext(struct ucontext __user *old_ctx,

+0 −3

Original line number	Diff line number	Diff line
		@@ -487,8 +487,6 @@ int htab_remove_mapping(unsigned long vstart, unsigned long vend,
		extern void pseries_add_gpage(u64 addr, u64 page_size, unsigned long number_of_pages);
		extern void demote_segment_4k(struct mm_struct *mm, unsigned long addr);

		extern void hash__setup_new_exec(void);

		#ifdef CONFIG_PPC_PSERIES
		void hpte_init_pseries(void);
		#else
		@@ -503,7 +501,6 @@ struct slb_entry {
		};

		extern void slb_initialize(void);
		extern void core_flush_all_slbs(struct mm_struct *mm);
		extern void slb_flush_and_rebolt(void);
		void slb_flush_all_realmode(void);
		void __slb_restore_bolted_realmode(void);

+8 −0

Original line number	Diff line number	Diff line
		@@ -60,6 +60,14 @@
		*/
		#define MAX_MCE_DEPTH 4

		/*
		* EX_LR is only used in EXSLB and where it does not overlap with EX_DAR
		* EX_CCR similarly with DSISR, but being 4 byte registers there is a hole
		* in the save area so it's not necessary to overlap them. Could be used
		* for future savings though if another 4 byte register was to be saved.
		*/
		#define EX_LR EX_DAR

		/*
		* EX_R3 is only used by the bad_stack handler. bad_stack reloads and
		* saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap

+15 −4

Original line number	Diff line number	Diff line
		@@ -113,10 +113,7 @@ struct paca_struct {
		* on the linear mapping */
		/* SLB related definitions */
		u16 vmalloc_sllp;
		u8 slb_cache_ptr;
		u8 stab_rr; /* stab/slb round-robin counter */
		u32 slb_used_bitmap; /* Bitmaps for first 32 SLB entries. */
		u32 slb_kern_bitmap;
		u16 slb_cache_ptr;
		u32 slb_cache[SLB_CACHE_ENTRIES];
		#endif /* CONFIG_PPC_BOOK3S_64 */

		@@ -146,11 +143,24 @@ struct paca_struct {
		struct tlb_core_data tcd;
		#endif /* CONFIG_PPC_BOOK3E */

		#ifdef CONFIG_PPC_BOOK3S
		mm_context_id_t mm_ctx_id;
		#ifdef CONFIG_PPC_MM_SLICES
		unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE];
		unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
		unsigned long mm_ctx_slb_addr_limit;
		#else
		u16 mm_ctx_user_psize;
		u16 mm_ctx_sllp;
		#endif
		#endif

		/*
		* then miscellaneous read-write fields
		*/
		struct task_struct __current; / Pointer to current */
		u64 kstack; /* Saved Kernel stack addr */
		u64 stab_rr; /* stab/slb round-robin counter */
		u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */
		u64 saved_msr; /* MSR saved here by enter_rtas */
		u16 trap_save; /* Used when bad stack is encountered */
		@@ -248,6 +258,7 @@ struct paca_struct {
		#endif /* CONFIG_PPC_BOOK3S_64 */
		} ____cacheline_aligned;

		extern void copy_mm_to_paca(struct mm_struct *mm);
		extern struct paca_struct **paca_ptrs;
		extern void initialise_paca(struct paca_struct *new_paca, int cpu);
		extern void setup_paca(struct paca_struct *new_paca);

+0 −1

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		@@ -273,7 +273,6 @@ struct thread_struct {
		#endif /* CONFIG_HAVE_HW_BREAKPOINT */
		struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */
		unsigned long trap_nr; /* last trap # on this thread */
		u8 load_slb; /* Ages out SLB preload cache entries */
		u8 load_fp;
		#ifdef CONFIG_ALTIVEC
		u8 load_vec;