Commit 54bbb665 authored by Cao Van Dong's avatar Cao Van Dong Committed by Geert Uytterhoeven
Browse files

clk: renesas: r8a779{5|6|65}: Add TPU clock 



This patch adds the TPU clock on the R-Car r8a7795/r8a7796/r8a77965
SoCs.

Signed-off-by: default avatarCao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent a188339c

drivers/clk/renesas/r8a7795-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -138,6 +138,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = { 
	DEF_MOD("cmt2",			 301,	R8A7795_CLK_R),

	DEF_MOD("cmt1",			 302,	R8A7795_CLK_R),

	DEF_MOD("cmt0",			 303,	R8A7795_CLK_R),

	DEF_MOD("tpu0",			 304,	R8A7795_CLK_S3D4),

	DEF_MOD("scif2",		 310,	R8A7795_CLK_S3D4),

	DEF_MOD("sdif3",		 311,	R8A7795_CLK_SD3),

	DEF_MOD("sdif2",		 312,	R8A7795_CLK_SD2),

drivers/clk/renesas/r8a7796-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -134,6 +134,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { 
	DEF_MOD("cmt2",			 301,	R8A7796_CLK_R),

	DEF_MOD("cmt1",			 302,	R8A7796_CLK_R),

	DEF_MOD("cmt0",			 303,	R8A7796_CLK_R),

	DEF_MOD("tpu0",			 304,	R8A7796_CLK_S3D4),

	DEF_MOD("scif2",		 310,	R8A7796_CLK_S3D4),

	DEF_MOD("sdif3",		 311,	R8A7796_CLK_SD3),

	DEF_MOD("sdif2",		 312,	R8A7796_CLK_SD2),

drivers/clk/renesas/r8a77965-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -132,6 +132,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { 
	DEF_MOD("cmt2",			301,	R8A77965_CLK_R),

	DEF_MOD("cmt1",			302,	R8A77965_CLK_R),

	DEF_MOD("cmt0",			303,	R8A77965_CLK_R),

	DEF_MOD("tpu0",			304,	R8A77965_CLK_S3D4),

	DEF_MOD("scif2",		310,	R8A77965_CLK_S3D4),

	DEF_MOD("sdif3",		311,	R8A77965_CLK_SD3),

	DEF_MOD("sdif2",		312,	R8A77965_CLK_SD2),

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