Unverified Commit 54a3da1c authored by Mark Brown's avatar Mark Brown
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Merge branch 'asoc-4.19' into asoc-4.20 Cirrus conflict

parents 1c8bc7b3 90a3b7f8
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+1 −2
Original line number Diff line number Diff line
@@ -13432,9 +13432,8 @@ F: drivers/i2c/busses/i2c-synquacer.c
F:	Documentation/devicetree/bindings/i2c/i2c-synquacer.txt

SOCIONEXT UNIPHIER SOUND DRIVER
M:	Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
S:	Maintained
S:	Orphan
F:	sound/soc/uniphier/

SOEKRIS NET48XX LED SUPPORT
+21 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/sizes.h>
#include <linux/pm_runtime.h>

@@ -184,6 +185,24 @@ static void config_dma_descriptor_in_sram(void __iomem *acp_mmio,
	acp_reg_write(descr_info->xfer_val, acp_mmio, mmACP_SRBM_Targ_Idx_Data);
}

static void pre_config_reset(void __iomem *acp_mmio, u16 ch_num)
{
	u32 dma_ctrl;
	int ret;

	/* clear the reset bit */
	dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
	dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChRst_MASK;
	acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
	/* check the reset bit before programming configuration registers */
	ret = readl_poll_timeout(acp_mmio + ((mmACP_DMA_CNTL_0 + ch_num) * 4),
				 dma_ctrl,
				 !(dma_ctrl & ACP_DMA_CNTL_0__DMAChRst_MASK),
				 100, ACP_DMA_RESET_TIME);
	if (ret < 0)
		pr_err("Failed to clear reset of channel : %d\n", ch_num);
}

/*
 * Initialize the DMA descriptor information for transfer between
 * system memory <-> ACP SRAM
@@ -236,6 +255,7 @@ static void set_acp_sysmem_dma_descriptors(void __iomem *acp_mmio,
		config_dma_descriptor_in_sram(acp_mmio, dma_dscr_idx,
					      &dmadscr[i]);
	}
	pre_config_reset(acp_mmio, ch);
	config_acp_dma_channel(acp_mmio, ch,
			       dma_dscr_idx - 1,
			       NUM_DSCRS_PER_CHANNEL,
@@ -275,6 +295,7 @@ static void set_acp_to_i2s_dma_descriptors(void __iomem *acp_mmio, u32 size,
		config_dma_descriptor_in_sram(acp_mmio, dma_dscr_idx,
					      &dmadscr[i]);
	}
	pre_config_reset(acp_mmio, ch);
	/* Configure the DMA channel with the above descriptore */
	config_acp_dma_channel(acp_mmio, ch, dma_dscr_idx - 1,
			       NUM_DSCRS_PER_CHANNEL,
+5 −0
Original line number Diff line number Diff line
@@ -462,6 +462,11 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
		goto rsnd_adg_get_clkout_end;

	req_size = prop->length / sizeof(u32);
	if (req_size > REQ_SIZE) {
		dev_err(dev,
			"too many clock-frequency, use top %d\n", REQ_SIZE);
		req_size = REQ_SIZE;
	}

	of_property_read_u32_array(np, "clock-frequency", req_rate, req_size);
	req_48kHz_rate = 0;
+9 −1
Original line number Diff line number Diff line
@@ -482,7 +482,7 @@ static int rsnd_status_update(u32 *status,
			(func_call && (mod)->ops->fn) ? #fn : "");	\
		if (func_call && (mod)->ops->fn)			\
			tmp = (mod)->ops->fn(mod, io, param);		\
		if (tmp)						\
		if (tmp && (tmp != -EPROBE_DEFER))			\
			dev_err(dev, "%s[%d] : %s error %d\n",		\
				rsnd_mod_name(mod), rsnd_mod_id(mod),	\
						     #fn, tmp);		\
@@ -1557,6 +1557,14 @@ exit_snd_probe:
		rsnd_dai_call(remove, &rdai->capture, priv);
	}

	/*
	 * adg is very special mod which can't use rsnd_dai_call(remove),
	 * and it registers ADG clock on probe.
	 * It should be unregister if probe failed.
	 * Mainly it is assuming -EPROBE_DEFER case
	 */
	rsnd_adg_remove(priv);

	return ret;
}

+4 −0
Original line number Diff line number Diff line
@@ -241,6 +241,10 @@ static int rsnd_dmaen_attach(struct rsnd_dai_stream *io,
	/* try to get DMAEngine channel */
	chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
	if (IS_ERR_OR_NULL(chan)) {
		/* Let's follow when -EPROBE_DEFER case */
		if (PTR_ERR(chan) == -EPROBE_DEFER)
			return PTR_ERR(chan);

		/*
		 * DMA failed. try to PIO mode
		 * see