Commit 547b311c authored by Ben Dooks's avatar Ben Dooks Committed by Vinod Koul
Browse files

dmaengine: tegra: fix incorrect case of DMA 



The use of Dma is annoying, since it is an acronym so should be all
upper case. Fix this throughout the driver.

Reviewed-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarBen Dooks <ben.dooks@codethink.co.uk>
Acked-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 216a1d7d

drivers/dma/tegra20-apb-dma.c

+10 −10
Original line number Diff line number Diff line
@@ -146,7 +146,7 @@ struct tegra_dma_channel_regs { 
};



/*

 * tegra_dma_sg_req: Dma request details to configure hardware. This

 * tegra_dma_sg_req: DMA request details to configure hardware. This

 * contains the details for one transfer to configure DMA hw.

 * The client's request for data transfer can be broken into multiple

 * sub-transfer as per requester details and hw support.
@@ -574,7 +574,7 @@ static bool handle_continuous_head_request(struct tegra_dma_channel *tdc, 
	struct tegra_dma_sg_req *hsgreq = NULL;



	if (list_empty(&tdc->pending_sg_req)) {

		dev_err(tdc2dev(tdc), "Dma is running without req\n");

		dev_err(tdc2dev(tdc), "DMA is running without req\n");

		tegra_dma_stop(tdc);

		return false;

	}
@@ -587,7 +587,7 @@ static bool handle_continuous_head_request(struct tegra_dma_channel *tdc, 
	hsgreq = list_first_entry(&tdc->pending_sg_req, typeof(*hsgreq), node);

	if (!hsgreq->configured) {

		tegra_dma_stop(tdc);

		dev_err(tdc2dev(tdc), "Error in dma transfer, aborting dma\n");

		dev_err(tdc2dev(tdc), "Error in DMA transfer, aborting DMA\n");

		tegra_dma_abort_all(tdc);

		return false;

	}
@@ -922,7 +922,7 @@ static int get_transfer_param(struct tegra_dma_channel *tdc, 
		return 0;



	default:

		dev_err(tdc2dev(tdc), "Dma direction is not supported\n");

		dev_err(tdc2dev(tdc), "DMA direction is not supported\n");

		return -EINVAL;

	}

	return -EINVAL;
@@ -955,7 +955,7 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_slave_sg( 
	enum dma_slave_buswidth slave_bw;



	if (!tdc->config_init) {

		dev_err(tdc2dev(tdc), "dma channel is not configured\n");

		dev_err(tdc2dev(tdc), "DMA channel is not configured\n");

		return NULL;

	}

	if (sg_len < 1) {
@@ -988,7 +988,7 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_slave_sg( 


	dma_desc = tegra_dma_desc_get(tdc);

	if (!dma_desc) {

		dev_err(tdc2dev(tdc), "Dma descriptors not available\n");

		dev_err(tdc2dev(tdc), "DMA descriptors not available\n");

		return NULL;

	}

	INIT_LIST_HEAD(&dma_desc->tx_list);
@@ -1008,14 +1008,14 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_slave_sg( 
		if ((len & 3) || (mem & 3) ||

				(len > tdc->tdma->chip_data->max_dma_count)) {

			dev_err(tdc2dev(tdc),

				"Dma length/memory address is not supported\n");

				"DMA length/memory address is not supported\n");

			tegra_dma_desc_put(tdc, dma_desc);

			return NULL;

		}



		sg_req = tegra_dma_sg_req_get(tdc);

		if (!sg_req) {

			dev_err(tdc2dev(tdc), "Dma sg-req not available\n");

			dev_err(tdc2dev(tdc), "DMA sg-req not available\n");

			tegra_dma_desc_put(tdc, dma_desc);

			return NULL;

		}
@@ -1090,7 +1090,7 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic( 
	 * terminating the DMA.

	 */

	if (tdc->busy) {

		dev_err(tdc2dev(tdc), "Request not allowed when dma running\n");

		dev_err(tdc2dev(tdc), "Request not allowed when DMA running\n");

		return NULL;

	}
@@ -1147,7 +1147,7 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic( 
	while (remain_len) {

		sg_req = tegra_dma_sg_req_get(tdc);

		if (!sg_req) {

			dev_err(tdc2dev(tdc), "Dma sg-req not available\n");

			dev_err(tdc2dev(tdc), "DMA sg-req not available\n");

			tegra_dma_desc_put(tdc, dma_desc);

			return NULL;

		}

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