crypto: arm/sha256-neon - avoid ADRL pseudo instruction (54781938) · Commits · 戴 / test

The ADRL pseudo instruction is not an architectural construct, but a convenience macro that was supported by the ARM proprietary assembler and adopted by binutils GAS as well, but only when assembling in 32-bit ARM mode. Therefore, it can only be used in assembler code that is known to assemble in ARM mode only, but as it turns out, the Clang assembler does not implement ADRL at all, and so it is better to get rid of it entirely. So replace the ADRL instruction with a ADR instruction that refers to a nearer symbol, and apply the delta explicitly using an additional instruction. Signed-off-by:

Ard Biesheuvel <ardb@kernel.org> Tested-by:

Nick Desaulniers <ndesaulniers@google.com> Signed-off-by:

Herbert Xu <herbert@gondor.apana.org.au>

arch/arm/crypto/sha256-armv4.pl

+2 −2

Original line number	Diff line number	Diff line
		@@ -175,7 +175,6 @@ $code=<<___;
		#else
		.syntax unified
		# ifdef __thumb2__
		# define adrl adr
		.thumb
		# else
		.code 32
		@@ -471,7 +470,8 @@ sha256_block_data_order_neon:
		stmdb sp!,{r4-r12,lr}

		sub $H,sp,#16*4+16
		adrl $Ktbl,K256
		adr $Ktbl,.Lsha256_block_data_order
		sub $Ktbl,$Ktbl,#.Lsha256_block_data_order-K256
		bic $H,$H,#15 @ align for 128-bit stores
		mov $t2,sp
		mov sp,$H @ alloca

arch/arm/crypto/sha256-core.S_shipped

+2 −2

Original line number	Diff line number	Diff line
		@@ -56,7 +56,6 @@
		#else
		.syntax unified
		# ifdef __thumb2__
		# define adrl adr
		.thumb
		# else
		.code 32
		@@ -1885,7 +1884,8 @@ sha256_block_data_order_neon:
		stmdb sp!,{r4-r12,lr}

		sub r11,sp,#16*4+16
		adrl r14,K256
		adr r14,.Lsha256_block_data_order
		sub r14,r14,#.Lsha256_block_data_order-K256
		bic r11,r11,#15 @ align for 128-bit stores
		mov r12,sp
		mov sp,r11 @ alloca

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