Commit 54728170 authored by Kevin Wang's avatar Kevin Wang Committed by Alex Deucher
Browse files

drm/amd/powerplay: add helper of smu_clk_dpm_is_enabled for smu 



v2: change function name to smu_clk_dpm_is_enabled.
add this helper function to check dpm clk feature is enabled.

Signed-off-by: default avatarKevin Wang <kevin1.wang@amd.com>
Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8e33376b

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+40 −23
Original line number Diff line number Diff line
@@ -69,6 +69,9 @@ int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, 
	if (min <= 0 && max <= 0)

		return -EINVAL;



	if (!smu_clk_dpm_is_enabled(smu, clk_type))

		return 0;



	clk_id = smu_clk_get_index(smu, clk_type);

	if (clk_id < 0)

		return clk_id;
@@ -102,6 +105,9 @@ int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, 
	if (min <= 0 && max <= 0)

		return -EINVAL;



	if (!smu_clk_dpm_is_enabled(smu, clk_type))

		return 0;



	clk_id = smu_clk_get_index(smu, clk_type);

	if (clk_id < 0)

		return clk_id;
@@ -135,29 +141,8 @@ int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, 
	if (!min && !max)

		return -EINVAL;



	switch (clk_type) {

	case SMU_MCLK:

	case SMU_UCLK:

		if (!smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) {

			pr_warn("uclk dpm is not enabled\n");

			return 0;

		}

		break;

	case SMU_GFXCLK:

	case SMU_SCLK:

		if (!smu_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) {

			pr_warn("gfxclk dpm is not enabled\n");

			return 0;

		}

	case SMU_SOCCLK:

		if (!smu_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {

			pr_warn("sockclk dpm is not enabled\n");

	if (!smu_clk_dpm_is_enabled(smu, clk_type))

		return 0;

		}

		break;

	default:

		break;

	}



	mutex_lock(&smu->mutex);

	clk_id = smu_clk_get_index(smu, clk_type);
@@ -200,6 +185,9 @@ int smu_get_dpm_freq_by_index(struct smu_context *smu, enum smu_clk_type clk_typ 
	if (!value)

		return -EINVAL;



	if (!smu_clk_dpm_is_enabled(smu, clk_type))

		return 0;



	clk_id = smu_clk_get_index(smu, clk_type);

	if (clk_id < 0)

		return clk_id;
@@ -228,6 +216,35 @@ int smu_get_dpm_level_count(struct smu_context *smu, enum smu_clk_type clk_type, 
	return smu_get_dpm_freq_by_index(smu, clk_type, 0xff, value);

}



bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type)

{

	enum smu_feature_mask feature_id = 0;



	switch (clk_type) {

	case SMU_MCLK:

	case SMU_UCLK:

		feature_id = SMU_FEATURE_DPM_UCLK_BIT;

		break;

	case SMU_GFXCLK:

	case SMU_SCLK:

		feature_id = SMU_FEATURE_DPM_GFXCLK_BIT;

		break;

	case SMU_SOCCLK:

		feature_id = SMU_FEATURE_DPM_SOCCLK_BIT;

		break;

	default:

		return true;

	}



	if(!smu_feature_is_enabled(smu, feature_id)) {

		pr_warn("smu %d clk dpm feature %d is not enabled\n", clk_type, feature_id);

		return false;

	}



	return true;

}





int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,

			   bool gate)

{

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

+1 −0
Original line number Diff line number Diff line
@@ -973,5 +973,6 @@ int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, 
enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu);

int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level);

int smu_set_display_count(struct smu_context *smu, uint32_t count);

bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type);



#endif

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