Commit 5441ea11 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-vc4-fixes-2016-02-17' of github.com:anholt/linux into drm-fixes 

This pull request fixes GPU reset (which was disabled shortly after
V3D integration due to build breakage) and waits for idle in the
presence of signals (which X likes to do a lot).

* tag 'drm-vc4-fixes-2016-02-17' of github.com:anholt/linux:
  drm/vc4: Use runtime PM to power cycle the device when the GPU hangs.
  drm/vc4: Enable runtime PM.
  drm/vc4: Fix spurious GPU resets due to BO reuse.
  drm/vc4: Drop error message on seqno wait timeouts.
  drm/vc4: Fix -ERESTARTSYS error return from BO waits.
  drm/vc4: Return an ERR_PTR from BO creation instead of NULL.
  drm/vc4: Fix the clear color for the first tile rendered.
  drm/vc4: Validate that WAIT_BO padding is cleared.
parents aaa7dd2c 36cb6253

drivers/gpu/drm/vc4/vc4_bo.c

+8 −8
Original line number Diff line number Diff line
@@ -215,7 +215,7 @@ struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size, 
	struct drm_gem_cma_object *cma_obj;



	if (size == 0)

		return NULL;

		return ERR_PTR(-EINVAL);



	/* First, try to get a vc4_bo from the kernel BO cache. */

	if (from_cache) {
@@ -237,7 +237,7 @@ struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size, 
		if (IS_ERR(cma_obj)) {

			DRM_ERROR("Failed to allocate from CMA:\n");

			vc4_bo_stats_dump(vc4);

			return NULL;

			return ERR_PTR(-ENOMEM);

		}

	}
@@ -259,8 +259,8 @@ int vc4_dumb_create(struct drm_file *file_priv, 
		args->size = args->pitch * args->height;



	bo = vc4_bo_create(dev, args->size, false);

	if (!bo)

		return -ENOMEM;

	if (IS_ERR(bo))

		return PTR_ERR(bo);



	ret = drm_gem_handle_create(file_priv, &bo->base.base, &args->handle);

	drm_gem_object_unreference_unlocked(&bo->base.base);
@@ -443,8 +443,8 @@ int vc4_create_bo_ioctl(struct drm_device *dev, void *data, 
	 * get zeroed, and that might leak data between users.

	 */

	bo = vc4_bo_create(dev, args->size, false);

	if (!bo)

		return -ENOMEM;

	if (IS_ERR(bo))

		return PTR_ERR(bo);



	ret = drm_gem_handle_create(file_priv, &bo->base.base, &args->handle);

	drm_gem_object_unreference_unlocked(&bo->base.base);
@@ -496,8 +496,8 @@ vc4_create_shader_bo_ioctl(struct drm_device *dev, void *data, 
	}



	bo = vc4_bo_create(dev, args->size, true);

	if (!bo)

		return -ENOMEM;

	if (IS_ERR(bo))

		return PTR_ERR(bo);



	ret = copy_from_user(bo->base.vaddr,

			     (void __user *)(uintptr_t)args->data,

drivers/gpu/drm/vc4/vc4_drv.h

+11 −2
Original line number Diff line number Diff line
@@ -91,8 +91,12 @@ struct vc4_dev { 
	struct vc4_bo *overflow_mem;

	struct work_struct overflow_mem_work;



	int power_refcount;



	/* Mutex controlling the power refcount. */

	struct mutex power_lock;



	struct {

		uint32_t last_ct0ca, last_ct1ca;

		struct timer_list timer;

		struct work_struct reset_work;

	} hangcheck;
@@ -142,6 +146,7 @@ struct vc4_seqno_cb { 
};



struct vc4_v3d {

	struct vc4_dev *vc4;

	struct platform_device *pdev;

	void __iomem *regs;

};
@@ -192,6 +197,11 @@ struct vc4_exec_info { 
	/* Sequence number for this bin/render job. */

	uint64_t seqno;



	/* Last current addresses the hardware was processing when the

	 * hangcheck timer checked on us.

	 */

	uint32_t last_ct0ca, last_ct1ca;



	/* Kernel-space copy of the ioctl arguments */

	struct drm_vc4_submit_cl *args;
@@ -434,7 +444,6 @@ void vc4_plane_async_set_fb(struct drm_plane *plane, 
extern struct platform_driver vc4_v3d_driver;

int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused);

int vc4_v3d_debugfs_regs(struct seq_file *m, void *unused);

int vc4_v3d_set_power(struct vc4_dev *vc4, bool on);



/* vc4_validate.c */

int

drivers/gpu/drm/vc4/vc4_gem.c

+49 −16
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 


#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/pm_runtime.h>

#include <linux/device.h>

#include <linux/io.h>
@@ -228,8 +229,16 @@ vc4_reset(struct drm_device *dev) 
	struct vc4_dev *vc4 = to_vc4_dev(dev);



	DRM_INFO("Resetting GPU.\n");

	vc4_v3d_set_power(vc4, false);

	vc4_v3d_set_power(vc4, true);



	mutex_lock(&vc4->power_lock);

	if (vc4->power_refcount) {

		/* Power the device off and back on the by dropping the

		 * reference on runtime PM.

		 */

		pm_runtime_put_sync_suspend(&vc4->v3d->pdev->dev);

		pm_runtime_get_sync(&vc4->v3d->pdev->dev);

	}

	mutex_unlock(&vc4->power_lock);



	vc4_irq_reset(dev);
@@ -257,10 +266,17 @@ vc4_hangcheck_elapsed(unsigned long data) 
	struct drm_device *dev = (struct drm_device *)data;

	struct vc4_dev *vc4 = to_vc4_dev(dev);

	uint32_t ct0ca, ct1ca;

	unsigned long irqflags;

	struct vc4_exec_info *exec;



	spin_lock_irqsave(&vc4->job_lock, irqflags);

	exec = vc4_first_job(vc4);



	/* If idle, we can stop watching for hangs. */

	if (list_empty(&vc4->job_list))

	if (!exec) {

		spin_unlock_irqrestore(&vc4->job_lock, irqflags);

		return;

	}



	ct0ca = V3D_READ(V3D_CTNCA(0));

	ct1ca = V3D_READ(V3D_CTNCA(1));
@@ -268,14 +284,16 @@ vc4_hangcheck_elapsed(unsigned long data) 
	/* If we've made any progress in execution, rearm the timer

	 * and wait.

	 */

	if (ct0ca != vc4->hangcheck.last_ct0ca ||

	    ct1ca != vc4->hangcheck.last_ct1ca) {

		vc4->hangcheck.last_ct0ca = ct0ca;

		vc4->hangcheck.last_ct1ca = ct1ca;

	if (ct0ca != exec->last_ct0ca || ct1ca != exec->last_ct1ca) {

		exec->last_ct0ca = ct0ca;

		exec->last_ct1ca = ct1ca;

		spin_unlock_irqrestore(&vc4->job_lock, irqflags);

		vc4_queue_hangcheck(dev);

		return;

	}



	spin_unlock_irqrestore(&vc4->job_lock, irqflags);



	/* We've gone too long with no progress, reset.  This has to

	 * be done from a work struct, since resetting can sleep and

	 * this timer hook isn't allowed to.
@@ -340,14 +358,9 @@ vc4_wait_for_seqno(struct drm_device *dev, uint64_t seqno, uint64_t timeout_ns, 
	finish_wait(&vc4->job_wait_queue, &wait);

	trace_vc4_wait_for_seqno_end(dev, seqno);



	if (ret && ret != -ERESTARTSYS) {

		DRM_ERROR("timeout waiting for render thread idle\n");

	return ret;

}



	return 0;

}



static void

vc4_flush_caches(struct drm_device *dev)

{
@@ -578,9 +591,9 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec) 
	}



	bo = vc4_bo_create(dev, exec_size, true);

	if (!bo) {

	if (IS_ERR(bo)) {

		DRM_ERROR("Couldn't allocate BO for binning\n");

		ret = -ENOMEM;

		ret = PTR_ERR(bo);

		goto fail;

	}

	exec->exec_bo = &bo->base;
@@ -617,6 +630,7 @@ fail: 
static void

vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec)

{

	struct vc4_dev *vc4 = to_vc4_dev(dev);

	unsigned i;



	/* Need the struct lock for drm_gem_object_unreference(). */
@@ -635,6 +649,11 @@ vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec) 
	}

	mutex_unlock(&dev->struct_mutex);



	mutex_lock(&vc4->power_lock);

	if (--vc4->power_refcount == 0)

		pm_runtime_put(&vc4->v3d->pdev->dev);

	mutex_unlock(&vc4->power_lock);



	kfree(exec);

}
@@ -746,6 +765,9 @@ vc4_wait_bo_ioctl(struct drm_device *dev, void *data, 
	struct drm_gem_object *gem_obj;

	struct vc4_bo *bo;



	if (args->pad != 0)

		return -EINVAL;



	gem_obj = drm_gem_object_lookup(dev, file_priv, args->handle);

	if (!gem_obj) {

		DRM_ERROR("Failed to look up GEM BO %d\n", args->handle);
@@ -772,7 +794,7 @@ vc4_submit_cl_ioctl(struct drm_device *dev, void *data, 
	struct vc4_dev *vc4 = to_vc4_dev(dev);

	struct drm_vc4_submit_cl *args = data;

	struct vc4_exec_info *exec;

	int ret;

	int ret = 0;



	if ((args->flags & ~VC4_SUBMIT_CL_USE_CLEAR_COLOR) != 0) {

		DRM_ERROR("Unknown flags: 0x%02x\n", args->flags);
@@ -785,6 +807,15 @@ vc4_submit_cl_ioctl(struct drm_device *dev, void *data, 
		return -ENOMEM;

	}



	mutex_lock(&vc4->power_lock);

	if (vc4->power_refcount++ == 0)

		ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);

	mutex_unlock(&vc4->power_lock);

	if (ret < 0) {

		kfree(exec);

		return ret;

	}



	exec->args = args;

	INIT_LIST_HEAD(&exec->unref_list);
@@ -839,6 +870,8 @@ vc4_gem_init(struct drm_device *dev) 
		    (unsigned long)dev);



	INIT_WORK(&vc4->job_done_work, vc4_job_done_work);



	mutex_init(&vc4->power_lock);

}



void

drivers/gpu/drm/vc4/vc4_irq.c

+1 −1
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ vc4_overflow_mem_work(struct work_struct *work) 
	struct vc4_bo *bo;



	bo = vc4_bo_create(dev, 256 * 1024, true);

	if (!bo) {

	if (IS_ERR(bo)) {

		DRM_ERROR("Couldn't allocate binner overflow mem\n");

		return;

	}

drivers/gpu/drm/vc4/vc4_render_cl.c

+11 −11
Original line number Diff line number Diff line
@@ -316,20 +316,11 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec, 
	size += xtiles * ytiles * loop_body_size;



	setup->rcl = &vc4_bo_create(dev, size, true)->base;

	if (!setup->rcl)

		return -ENOMEM;

	if (IS_ERR(setup->rcl))

		return PTR_ERR(setup->rcl);

	list_add_tail(&to_vc4_bo(&setup->rcl->base)->unref_head,

		      &exec->unref_list);



	rcl_u8(setup, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);

	rcl_u32(setup,

		(setup->color_write ? (setup->color_write->paddr +

				       args->color_write.offset) :

		 0));

	rcl_u16(setup, args->width);

	rcl_u16(setup, args->height);

	rcl_u16(setup, args->color_write.bits);



	/* The tile buffer gets cleared when the previous tile is stored.  If

	 * the clear values changed between frames, then the tile buffer has

	 * stale clear values in it, so we have to do a store in None mode (no
@@ -349,6 +340,15 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec, 
		rcl_u32(setup, 0); /* no address, since we're in None mode */

	}



	rcl_u8(setup, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);

	rcl_u32(setup,

		(setup->color_write ? (setup->color_write->paddr +

				       args->color_write.offset) :

		 0));

	rcl_u16(setup, args->width);

	rcl_u16(setup, args->height);

	rcl_u16(setup, args->color_write.bits);



	for (y = min_y_tile; y <= max_y_tile; y++) {

		for (x = min_x_tile; x <= max_x_tile; x++) {

			bool first = (x == min_x_tile && y == min_y_tile);

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