Commit 540b5738 authored by Dave Martin's avatar Dave Martin Committed by Russell King
Browse files

ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state 



Currently, the documented kernel entry requirements are not
explicit about whether the kernel should be entered in ARM or
Thumb, leading to an ambiguitity about how to enter Thumb-2
kernels.  As a result, the kernel is reliant on the zImage
decompressor to enter the kernel proper in the correct instruction
set state.

This patch changes the boot entry protocol for head.S and Image to
be the same as for zImage: in all cases, the kernel is now entered
in ARM.

Documentation/arm/Booting is updated to reflect this new policy.

A different rule will be needed for Cortex-M class CPUs as and when
support for those lands in mainline, since these CPUs don't support
the ARM instruction set at all: a note is added to the effect that
the kernel must be entered in Thumb on such systems.

Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
Acked-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent c7e89b16

Documentation/arm/Booting

+5 −0
Original line number Diff line number Diff line
@@ -164,3 +164,8 @@ In either case, the following conditions must be met: 
- The boot loader is expected to call the kernel image by jumping

  directly to the first instruction of the kernel image.



  On CPUs supporting the ARM instruction set, the entry must be

  made in ARM state, even for a Thumb-2 kernel.



  On CPUs supporting only the Thumb instruction set such as

  Cortex-M class CPUs, the entry must be made in Thumb state.

arch/arm/boot/compressed/head.S

+2 −1
Original line number Diff line number Diff line
@@ -353,7 +353,8 @@ not_relocated: mov r0, #0 
		mov	r0, #0			@ must be zero

		mov	r1, r7			@ restore architecture number

		mov	r2, r8			@ restore atags pointer

		mov	pc, r4			@ call kernel

 ARM(		mov	pc, r4	)		@ call kernel

 THUMB(		bx	r4	)		@ entry point is always ARM



		.align	2

		.type	LC0, #object

arch/arm/kernel/head-nommu.S

+8 −0
Original line number Diff line number Diff line
@@ -32,8 +32,16 @@ 
 * numbers for r1.

 *

 */

	.arm



	__HEAD

ENTRY(stext)



 THUMB(	adr	r9, BSYM(1f)	)	@ Kernel is always entered in ARM.

 THUMB(	bx	r9		)	@ If this is a Thumb-2 kernel,

 THUMB(	.thumb			)	@ switch to Thumb now.

 THUMB(1:			)



	setmode	PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode

						@ and irqs disabled

#ifndef CONFIG_CPU_CP15

arch/arm/kernel/head.S

+8 −0
Original line number Diff line number Diff line
@@ -71,8 +71,16 @@ 
 * crap here - that's what the boot loader (or in extreme, well justified

 * circumstances, zImage) is for.

 */

	.arm



	__HEAD

ENTRY(stext)



 THUMB(	adr	r9, BSYM(1f)	)	@ Kernel is always entered in ARM.

 THUMB(	bx	r9		)	@ If this is a Thumb-2 kernel,

 THUMB(	.thumb			)	@ switch to Thumb now.

 THUMB(1:			)



	setmode	PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode

						@ and irqs disabled

	mrc	p15, 0, r9, c0, c0		@ get processor id

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