platform/x86: intel_pmc_core: Add Comet Lake (CML) platform support to intel_pmc_core driver (5406327d) · Commits · 戴 / test

Add Comet Lake to the list of the platforms that intel_pmc_core driver supports for pmc_core device. Just like Ice Lake, Comet Lake can also reuse all the Cannon Lake PCH IPs. No additional effort is needed to enable but to simply reuse them. Cc: Mario Limonciello <mario.limonciello@dell.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Kan Liang <kan.liang@intel.com> Cc: David E. Box <david.e.box@intel.com> Cc: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by:

Gayatri Kammela <gayatri.kammela@intel.com> Signed-off-by:

Andy Shevchenko <andriy.shevchenko@linux.intel.com>

drivers/platform/x86/intel_pmc_core.c

+5 −2

Original line number	Diff line number	Diff line
		@@ -160,6 +160,7 @@ static const struct pmc_reg_map spt_reg_map = {

		/* Cannon Lake: PGD PFET Enable Ack Status Register(s) bitmap */
		static const struct pmc_bit_map cnp_pfear_map[] = {
		/* Reserved for Cannon Lake but valid for Comet Lake */
		{"PMC", BIT(0)},
		{"OPI-DMI", BIT(1)},
		{"SPI/eSPI", BIT(2)},
		@@ -185,7 +186,7 @@ static const struct pmc_bit_map cnp_pfear_map[] = {
		{"SDX", BIT(4)},
		{"SPE", BIT(5)},
		{"Fuse", BIT(6)},
		/* Reserved for Cannon Lake but valid for Ice Lake */
		/* Reserved for Cannon Lake but valid for Ice Lake and Comet Lake */
		{"SBR8", BIT(7)},

		{"CSME_FSC", BIT(0)},
		@@ -229,7 +230,7 @@ static const struct pmc_bit_map cnp_pfear_map[] = {
		{"HDA_PGD4", BIT(2)},
		{"HDA_PGD5", BIT(3)},
		{"HDA_PGD6", BIT(4)},
		/* Reserved for Cannon Lake but valid for Ice Lake */
		/* Reserved for Cannon Lake but valid for Ice Lake and Comet Lake */
		{"PSF6", BIT(5)},
		{"PSF7", BIT(6)},
		{"PSF8", BIT(7)},
		@@ -813,6 +814,8 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = {
		INTEL_CPU_FAM6(CANNONLAKE_L, cnp_reg_map),
		INTEL_CPU_FAM6(ICELAKE_L, icl_reg_map),
		INTEL_CPU_FAM6(ICELAKE_NNPI, icl_reg_map),
		INTEL_CPU_FAM6(COMETLAKE, cnp_reg_map),
		INTEL_CPU_FAM6(COMETLAKE_L, cnp_reg_map),
		{}
		};

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