Commit 53d9cc73 authored by Tony Lindgren's avatar Tony Lindgren Committed by Russell King
Browse files

[ARM] 3279/1: OMAP: 1/3 Fix low-level io init 



Patch from Tony Lindgren

This patch adds the missing cache flushes to common low-level
init that are needed to access the IO region. These flushes
are normally done at the end of devicemaps_init(), but we
need to detect the OMAP core type early.

Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 083d06ed

arch/arm/mach-omap1/io.c

+25 −17
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include <linux/kernel.h>

#include <linux/init.h>



#include <asm/tlb.h>

#include <asm/mach/map.h>

#include <asm/io.h>

#include <asm/arch/mux.h>
@@ -83,15 +84,24 @@ static struct map_desc omap16xx_io_desc[] __initdata = { 
};

#endif



static int initialized = 0;



static void __init _omap_map_io(void)

/*

 * Maps common IO regions for omap1. This should only get called from

 * board specific init.

 */

void __init omap1_map_common_io(void)

{

	initialized = 1;



	/* We have to initialize the IO space mapping before we can run

	 * cpu_is_omapxxx() macros. */

	iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));



	/* Normally devicemaps_init() would flush caches and tlb after

	 * mdesc->map_io(), but we must also do it here because of the CPU

	 * revision check below.

	 */

	local_flush_tlb_all();

	flush_cache_all();



	/* We want to check CPU revision early for cpu_is_omapxxxx() macros.

	 * IO space mapping must be initialized before we can do that.

	 */

	omap_check_revision();



#ifdef CONFIG_ARCH_OMAP730
@@ -111,7 +121,14 @@ static void __init _omap_map_io(void) 
#endif



	omap_sram_init();

}



/*

 * Common low-level hardware init for omap1. This should only get called from

 * board specific init.

 */

void __init omap1_init_common_hw()

{

	/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort

	 * on a Posted Write in the TIPB Bridge".

	 */
@@ -121,16 +138,7 @@ static void __init _omap_map_io(void) 
	/* Must init clocks early to assure that timer interrupt works

	 */

	omap1_clk_init();

}



/*

 * This should only get called from board specific init

 */

void __init omap_map_common_io(void)

{

	if (!initialized) {

		_omap_map_io();

	omap1_mux_init();

}

}

arch/arm/plat-omap/sram.c

+9 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <linux/init.h>



#include <asm/mach/map.h>

#include <asm/tlb.h>

#include <asm/io.h>

#include <asm/cacheflush.h>
@@ -95,6 +96,14 @@ void __init omap_map_sram(void) 
	       omap_sram_io_desc[0].pfn, omap_sram_io_desc[0].virtual,

	       omap_sram_io_desc[0].length);



	/*

	 * Normally devicemaps_init() would flush caches and tlb after

	 * mdesc->map_io(), but since we're called from map_io(), we

	 * must do it here.

	 */

	local_flush_tlb_all();

	flush_cache_all();



	/*

	 * Looks like we need to preserve some bootloader code at the

	 * beginning of SRAM for jumping to flash for reboot to work...

include/asm-arm/arch-omap/io.h

+5 −1
Original line number Diff line number Diff line
@@ -116,7 +116,11 @@ typedef struct { volatile u32 offset[4096]; } __regbase32; 
					->offset[((vaddr)&4095)>>2]

#define __REG32(paddr)		__REGV32(io_p2v(paddr))



extern void omap_map_common_io(void);

extern void omap1_map_common_io(void);

extern void omap1_init_common_hw(void);



extern void omap2_map_common_io(void);

extern void omap2_init_common_hw(void);



#else

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