Commit 53b963b6 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: add new bit mask to ctrl clock stretch feature. 



Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d8c1abd9

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

+1 −1
Original line number Diff line number Diff line
@@ -1428,7 +1428,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) 
		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,

				PHM_PlatformCaps_ControlVDDCI);



	if ((hwmgr->pp_table_version != PP_TABLE_V0)

	if ((hwmgr->pp_table_version != PP_TABLE_V0) && (hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK)

		&& (table_info->cac_dtp_table->usClockStretchAmount != 0))

		phm_cap_set(hwmgr->platform_descriptor.platformCaps,

					PHM_PlatformCaps_ClockStretcher);

drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

+2 −1
Original line number Diff line number Diff line
@@ -85,7 +85,8 @@ enum PP_FEATURE_MASK { 
	PP_SMC_VOLTAGE_CONTROL_MASK = 0x40,

	PP_VBI_TIME_SUPPORT_MASK = 0x80,

	PP_ULV_MASK = 0x100,

	PP_ENABLE_GFX_CG_THRU_SMU = 0x200

	PP_ENABLE_GFX_CG_THRU_SMU = 0x200,

	PP_CLOCK_STRETCH_MASK = 0x400,

};



enum PHM_BackEnd_Magic {

CRA Git | Maintained and supported by SUSTech CRA and CCSE