Commit 53830536 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-vmware-next' into drm-core-next 

* drm-vmware-next: (26 commits)
  vmwgfx: Minor cleanups
  vmwgfx: Bump driver minor to advertise support for new ioctls.
  vmwgfx: Be more strict with fb depths when using screen objects
  vmwgfx: Handle device surface memory limit
  vmwgfx: Make sure we always have a user-space handle to use for objects that are backing kms framebuffers.
  vmwgfx: Optimize the command submission resource list
  vmwgfx: Fix up query processing
  vmwgfx: Allow reference and unreference of NULL fence objects.
  vmwgfx: minor dmabuf utilities cleanup
  vmwgfx: Disallow user space to send present and readback commands
  vmwgfx: Add present and readback ioctls
  vmwgfx: Place overlays in GMR area if we can
  vmwgfx: Drop 3D Legacy Display Unit support
  vmwgfx: Require HWV8 for 3d support
  vmwgfx: Add screen object support
  vmwgfx: Add dmabuf helper functions for pinning
  vmwgfx: Refactor common display unit functions to shared file
  vmwgfx: Expand the command checker to cover screen object commands
  vmwgfx: Break out dirty submission code
  vmwgfx: Break out execbuf command processing
  ...
parents 88ef4e3f 6ea77d13

drivers/gpu/drm/ttm/ttm_bo.c

+1 −0
Original line number Diff line number Diff line
@@ -1295,6 +1295,7 @@ int ttm_bo_create(struct ttm_bo_device *bdev, 


	return ret;

}

EXPORT_SYMBOL(ttm_bo_create);



static int ttm_bo_force_list_clean(struct ttm_bo_device *bdev,

					unsigned mem_type, bool allow_errors)

drivers/gpu/drm/vmwgfx/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -5,6 +5,6 @@ vmwgfx-y := vmwgfx_execbuf.o vmwgfx_gmr.o vmwgfx_kms.o vmwgfx_drv.o \ 
	    vmwgfx_fb.o vmwgfx_ioctl.o vmwgfx_resource.o vmwgfx_buffer.o \

	    vmwgfx_fifo.o vmwgfx_irq.o vmwgfx_ldu.o vmwgfx_ttm_glue.o \

	    vmwgfx_overlay.o vmwgfx_marker.o vmwgfx_gmrid_manager.o \

	    vmwgfx_fence.o

	    vmwgfx_fence.o vmwgfx_dmabuf.o vmwgfx_scrn.o



obj-$(CONFIG_DRM_VMWGFX) := vmwgfx.o

drivers/gpu/drm/vmwgfx/svga3d_reg.h

+181 −78
Original line number Diff line number Diff line
@@ -57,7 +57,8 @@ typedef enum { 
   SVGA3D_HWVERSION_WS6_B1    = SVGA3D_MAKE_HWVERSION(1, 1),

   SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4),

   SVGA3D_HWVERSION_WS65_B1   = SVGA3D_MAKE_HWVERSION(2, 0),

   SVGA3D_HWVERSION_CURRENT   = SVGA3D_HWVERSION_WS65_B1,

   SVGA3D_HWVERSION_WS8_B1    = SVGA3D_MAKE_HWVERSION(2, 1),

   SVGA3D_HWVERSION_CURRENT   = SVGA3D_HWVERSION_WS8_B1,

} SVGA3dHardwareVersion;



/*
@@ -67,7 +68,8 @@ typedef enum { 
typedef uint32 SVGA3dBool; /* 32-bit Bool definition */

#define SVGA3D_NUM_CLIPPLANES                   6

#define SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS  8



#define SVGA3D_MAX_CONTEXT_IDS                  256

#define SVGA3D_MAX_SURFACE_IDS                  (32 * 1024)



/*

 * Surface formats.
@@ -137,6 +139,7 @@ typedef enum SVGA3dSurfaceFormat { 
    * the most efficient format to use when creating new surfaces

    * expressly for index or vertex data.

    */



   SVGA3D_BUFFER                       = 37,



   SVGA3D_Z_D24X8                      = 38,
@@ -150,6 +153,20 @@ typedef enum SVGA3dSurfaceFormat { 
   SVGA3D_UYVY                         = 42,

   SVGA3D_YUY2                         = 43,



   /* Planar video formats */

   SVGA3D_NV12                         = 44,



   /* Video format with alpha */

   SVGA3D_AYUV                         = 45,



   SVGA3D_BC4_UNORM                    = 108,

   SVGA3D_BC5_UNORM                    = 111,



   /* Advanced D3D9 depth formats. */

   SVGA3D_Z_DF16                       = 118,

   SVGA3D_Z_DF24                       = 119,

   SVGA3D_Z_D24S8_INT                  = 120,



   SVGA3D_FORMAT_MAX

} SVGA3dSurfaceFormat;
@@ -414,9 +431,19 @@ typedef enum { 
   SVGA3D_RS_SRCBLENDALPHA             = 94,    /* SVGA3dBlendOp */

   SVGA3D_RS_DSTBLENDALPHA             = 95,    /* SVGA3dBlendOp */

   SVGA3D_RS_BLENDEQUATIONALPHA        = 96,    /* SVGA3dBlendEquation */

   SVGA3D_RS_TRANSPARENCYANTIALIAS     = 97,    /* SVGA3dTransparencyAntialiasType */

   SVGA3D_RS_LINEAA                    = 98,    /* SVGA3dBool */

   SVGA3D_RS_LINEWIDTH                 = 99,    /* float */

   SVGA3D_RS_MAX

} SVGA3dRenderStateName;



typedef enum {

   SVGA3D_TRANSPARENCYANTIALIAS_NORMAL            = 0,

   SVGA3D_TRANSPARENCYANTIALIAS_ALPHATOCOVERAGE   = 1,

   SVGA3D_TRANSPARENCYANTIALIAS_SUPERSAMPLE       = 2,

   SVGA3D_TRANSPARENCYANTIALIAS_MAX

} SVGA3dTransparencyAntialiasType;



typedef enum {

   SVGA3D_VERTEXMATERIAL_NONE     = 0,    /* Use the value in the current material */

   SVGA3D_VERTEXMATERIAL_DIFFUSE  = 1,    /* Use the value in the diffuse component */
@@ -728,10 +755,10 @@ typedef enum { 
   SVGA3D_TEX_FILTER_NEAREST        = 1,

   SVGA3D_TEX_FILTER_LINEAR         = 2,

   SVGA3D_TEX_FILTER_ANISOTROPIC    = 3,

   SVGA3D_TEX_FILTER_FLATCUBIC      = 4, // Deprecated, not implemented

   SVGA3D_TEX_FILTER_GAUSSIANCUBIC  = 5, // Deprecated, not implemented

   SVGA3D_TEX_FILTER_PYRAMIDALQUAD  = 6, // Not currently implemented

   SVGA3D_TEX_FILTER_GAUSSIANQUAD   = 7, // Not currently implemented

   SVGA3D_TEX_FILTER_FLATCUBIC      = 4, /* Deprecated, not implemented */

   SVGA3D_TEX_FILTER_GAUSSIANCUBIC  = 5, /* Deprecated, not implemented */

   SVGA3D_TEX_FILTER_PYRAMIDALQUAD  = 6, /* Not currently implemented */

   SVGA3D_TEX_FILTER_GAUSSIANQUAD   = 7, /* Not currently implemented */

   SVGA3D_TEX_FILTER_MAX

} SVGA3dTextureFilter;
@@ -799,19 +826,19 @@ typedef enum { 


typedef enum {

   SVGA3D_DECLUSAGE_POSITION     = 0,

   SVGA3D_DECLUSAGE_BLENDWEIGHT,       //  1

   SVGA3D_DECLUSAGE_BLENDINDICES,      //  2

   SVGA3D_DECLUSAGE_NORMAL,            //  3

   SVGA3D_DECLUSAGE_PSIZE,             //  4

   SVGA3D_DECLUSAGE_TEXCOORD,          //  5

   SVGA3D_DECLUSAGE_TANGENT,           //  6

   SVGA3D_DECLUSAGE_BINORMAL,          //  7

   SVGA3D_DECLUSAGE_TESSFACTOR,        //  8

   SVGA3D_DECLUSAGE_POSITIONT,         //  9

   SVGA3D_DECLUSAGE_COLOR,             // 10

   SVGA3D_DECLUSAGE_FOG,               // 11

   SVGA3D_DECLUSAGE_DEPTH,             // 12

   SVGA3D_DECLUSAGE_SAMPLE,            // 13

   SVGA3D_DECLUSAGE_BLENDWEIGHT,       /*  1 */

   SVGA3D_DECLUSAGE_BLENDINDICES,      /*  2 */

   SVGA3D_DECLUSAGE_NORMAL,            /*  3 */

   SVGA3D_DECLUSAGE_PSIZE,             /*  4 */

   SVGA3D_DECLUSAGE_TEXCOORD,          /*  5 */

   SVGA3D_DECLUSAGE_TANGENT,           /*  6 */

   SVGA3D_DECLUSAGE_BINORMAL,          /*  7 */

   SVGA3D_DECLUSAGE_TESSFACTOR,        /*  8 */

   SVGA3D_DECLUSAGE_POSITIONT,         /*  9 */

   SVGA3D_DECLUSAGE_COLOR,             /* 10 */

   SVGA3D_DECLUSAGE_FOG,               /* 11 */

   SVGA3D_DECLUSAGE_DEPTH,             /* 12 */

   SVGA3D_DECLUSAGE_SAMPLE,            /* 13 */

   SVGA3D_DECLUSAGE_MAX

} SVGA3dDeclUsage;
@@ -819,10 +846,10 @@ typedef enum { 
   SVGA3D_DECLMETHOD_DEFAULT     = 0,

   SVGA3D_DECLMETHOD_PARTIALU,

   SVGA3D_DECLMETHOD_PARTIALV,

   SVGA3D_DECLMETHOD_CROSSUV,          // Normal

   SVGA3D_DECLMETHOD_CROSSUV,          /* Normal */

   SVGA3D_DECLMETHOD_UV,

   SVGA3D_DECLMETHOD_LOOKUP,           // Lookup a displacement map

   SVGA3D_DECLMETHOD_LOOKUPPRESAMPLED, // Lookup a pre-sampled displacement map

   SVGA3D_DECLMETHOD_LOOKUP,           /* Lookup a displacement map */

   SVGA3D_DECLMETHOD_LOOKUPPRESAMPLED, /* Lookup a pre-sampled displacement map */

} SVGA3dDeclMethod;



typedef enum {
@@ -930,7 +957,6 @@ typedef enum { 
} SVGA3dCubeFace;



typedef enum {

   SVGA3D_SHADERTYPE_COMPILED_DX8               = 0,

   SVGA3D_SHADERTYPE_VS                         = 1,

   SVGA3D_SHADERTYPE_PS                         = 2,

   SVGA3D_SHADERTYPE_MAX
@@ -968,11 +994,17 @@ typedef enum { 
} SVGA3dTransferType;



/*

 * The maximum number vertex arrays we're guaranteed to support in

 * The maximum number of vertex arrays we're guaranteed to support in

 * SVGA_3D_CMD_DRAWPRIMITIVES.

 */

#define SVGA3D_MAX_VERTEX_ARRAYS   32



/*

 * The maximum number of primitive ranges we're guaranteed to support

 * in SVGA_3D_CMD_DRAWPRIMITIVES.

 */

#define SVGA3D_MAX_DRAW_PRIMITIVE_RANGES 32



/*

 * Identifiers for commands in the command FIFO.

 *
@@ -990,7 +1022,7 @@ typedef enum { 
#define SVGA_3D_CMD_LEGACY_BASE            1000

#define SVGA_3D_CMD_BASE                   1040



#define SVGA_3D_CMD_SURFACE_DEFINE         SVGA_3D_CMD_BASE + 0

#define SVGA_3D_CMD_SURFACE_DEFINE         SVGA_3D_CMD_BASE + 0     /* Deprecated */

#define SVGA_3D_CMD_SURFACE_DESTROY        SVGA_3D_CMD_BASE + 1

#define SVGA_3D_CMD_SURFACE_COPY           SVGA_3D_CMD_BASE + 2

#define SVGA_3D_CMD_SURFACE_STRETCHBLT     SVGA_3D_CMD_BASE + 3
@@ -1008,7 +1040,7 @@ typedef enum { 
#define SVGA_3D_CMD_SETVIEWPORT            SVGA_3D_CMD_BASE + 15

#define SVGA_3D_CMD_SETCLIPPLANE           SVGA_3D_CMD_BASE + 16

#define SVGA_3D_CMD_CLEAR                  SVGA_3D_CMD_BASE + 17

#define SVGA_3D_CMD_PRESENT                SVGA_3D_CMD_BASE + 18    // Deprecated

#define SVGA_3D_CMD_PRESENT                SVGA_3D_CMD_BASE + 18    /* Deprecated */

#define SVGA_3D_CMD_SHADER_DEFINE          SVGA_3D_CMD_BASE + 19

#define SVGA_3D_CMD_SHADER_DESTROY         SVGA_3D_CMD_BASE + 20

#define SVGA_3D_CMD_SET_SHADER             SVGA_3D_CMD_BASE + 21
@@ -1018,9 +1050,13 @@ typedef enum { 
#define SVGA_3D_CMD_BEGIN_QUERY            SVGA_3D_CMD_BASE + 25

#define SVGA_3D_CMD_END_QUERY              SVGA_3D_CMD_BASE + 26

#define SVGA_3D_CMD_WAIT_FOR_QUERY         SVGA_3D_CMD_BASE + 27

#define SVGA_3D_CMD_PRESENT_READBACK       SVGA_3D_CMD_BASE + 28    // Deprecated

#define SVGA_3D_CMD_PRESENT_READBACK       SVGA_3D_CMD_BASE + 28    /* Deprecated */

#define SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN SVGA_3D_CMD_BASE + 29

#define SVGA_3D_CMD_MAX                    SVGA_3D_CMD_BASE + 30

#define SVGA_3D_CMD_SURFACE_DEFINE_V2      SVGA_3D_CMD_BASE + 30

#define SVGA_3D_CMD_GENERATE_MIPMAPS       SVGA_3D_CMD_BASE + 31

#define SVGA_3D_CMD_ACTIVATE_SURFACE       SVGA_3D_CMD_BASE + 40

#define SVGA_3D_CMD_DEACTIVATE_SURFACE     SVGA_3D_CMD_BASE + 41

#define SVGA_3D_CMD_MAX                    SVGA_3D_CMD_BASE + 42



#define SVGA_3D_CMD_FUTURE_MAX             2000
@@ -1031,9 +1067,9 @@ typedef enum { 
typedef struct {

   union {

      struct {

         uint16  function;       // SVGA3dFogFunction

         uint8   type;           // SVGA3dFogType

         uint8   base;           // SVGA3dFogBase

         uint16  function;       /* SVGA3dFogFunction */

         uint8   type;           /* SVGA3dFogType */

         uint8   base;           /* SVGA3dFogBase */

      };

      uint32     uintValue;

   };
@@ -1109,6 +1145,8 @@ typedef enum { 
   SVGA3D_SURFACE_HINT_RENDERTARGET    = (1 << 6),

   SVGA3D_SURFACE_HINT_DEPTHSTENCIL    = (1 << 7),

   SVGA3D_SURFACE_HINT_WRITEONLY       = (1 << 8),

   SVGA3D_SURFACE_MASKABLE_ANTIALIAS   = (1 << 9),

   SVGA3D_SURFACE_AUTOGENMIPMAPS       = (1 << 10),

} SVGA3dSurfaceFlags;



typedef
@@ -1121,6 +1159,12 @@ struct { 
   uint32                      sid;

   SVGA3dSurfaceFlags          surfaceFlags;

   SVGA3dSurfaceFormat         format;

   /*

    * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace

    * structures must have the same value of numMipLevels field.

    * Otherwise, all but the first SVGA3dSurfaceFace structures must have the

    * numMipLevels set to 0.

    */

   SVGA3dSurfaceFace           face[SVGA3D_MAX_SURFACE_FACES];

   /*

    * Followed by an SVGA3dSize structure for each mip level in each face.
@@ -1133,6 +1177,31 @@ struct { 
    */

} SVGA3dCmdDefineSurface;       /* SVGA_3D_CMD_SURFACE_DEFINE */



typedef

struct {

   uint32                      sid;

   SVGA3dSurfaceFlags          surfaceFlags;

   SVGA3dSurfaceFormat         format;

   /*

    * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace

    * structures must have the same value of numMipLevels field.

    * Otherwise, all but the first SVGA3dSurfaceFace structures must have the

    * numMipLevels set to 0.

    */

   SVGA3dSurfaceFace           face[SVGA3D_MAX_SURFACE_FACES];

   uint32                      multisampleCount;

   SVGA3dTextureFilter         autogenFilter;

   /*

    * Followed by an SVGA3dSize structure for each mip level in each face.

    *

    * A note on surface sizes: Sizes are always specified in pixels,

    * even if the true surface size is not a multiple of the minimum

    * block size of the surface's format. For example, a 3x3x1 DXT1

    * compressed texture would actually be stored as a 4x4x1 image in

    * memory.

    */

} SVGA3dCmdDefineSurface_v2;     /* SVGA_3D_CMD_SURFACE_DEFINE_V2 */



typedef

struct {

   uint32               sid;
@@ -1474,10 +1543,12 @@ struct { 
    * SVGA3dCmdDrawPrimitives structure. In order,

    * they are:

    *

    * 1. SVGA3dVertexDecl, quantity 'numVertexDecls'

    * 2. SVGA3dPrimitiveRange, quantity 'numRanges'

    * 1. SVGA3dVertexDecl, quantity 'numVertexDecls', but no more than

    *    SVGA3D_MAX_VERTEX_ARRAYS;

    * 2. SVGA3dPrimitiveRange, quantity 'numRanges', but no more than

    *    SVGA3D_MAX_DRAW_PRIMITIVE_RANGES;

    * 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains

    *    the frequency divisor for this the corresponding vertex decl)

    *    the frequency divisor for the corresponding vertex decl).

    */

} SVGA3dCmdDrawPrimitives;      /* SVGA_3D_CMD_DRAWPRIMITIVES */
@@ -1671,6 +1742,12 @@ struct { 
   /* Clipping: zero or more SVGASignedRects follow */

} SVGA3dCmdBlitSurfaceToScreen;         /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */



typedef

struct {

   uint32               sid;

   SVGA3dTextureFilter  filter;

} SVGA3dCmdGenerateMipmaps;             /* SVGA_3D_CMD_GENERATE_MIPMAPS */





/*

 * Capability query index.
@@ -1774,6 +1851,32 @@ typedef enum { 
   SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16           = 67,

   SVGA3D_DEVCAP_SURFACEFMT_UYVY                   = 68,

   SVGA3D_DEVCAP_SURFACEFMT_YUY2                   = 69,

   SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES    = 70,

   SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES       = 71,

   SVGA3D_DEVCAP_ALPHATOCOVERAGE                   = 72,

   SVGA3D_DEVCAP_SUPERSAMPLE                       = 73,

   SVGA3D_DEVCAP_AUTOGENMIPMAPS                    = 74,

   SVGA3D_DEVCAP_SURFACEFMT_NV12                   = 75,

   SVGA3D_DEVCAP_SURFACEFMT_AYUV                   = 76,



   /*

    * This is the maximum number of SVGA context IDs that the guest

    * can define using SVGA_3D_CMD_CONTEXT_DEFINE.

    */

   SVGA3D_DEVCAP_MAX_CONTEXT_IDS                   = 77,



   /*

    * This is the maximum number of SVGA surface IDs that the guest

    * can define using SVGA_3D_CMD_SURFACE_DEFINE*.

    */

   SVGA3D_DEVCAP_MAX_SURFACE_IDS                   = 78,



   SVGA3D_DEVCAP_SURFACEFMT_Z_DF16                 = 79,

   SVGA3D_DEVCAP_SURFACEFMT_Z_DF24                 = 80,

   SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT            = 81,



   SVGA3D_DEVCAP_SURFACEFMT_BC4_UNORM              = 82,

   SVGA3D_DEVCAP_SURFACEFMT_BC5_UNORM              = 83,



   /*

    * Don't add new caps into the previous section; the values in this

drivers/gpu/drm/vmwgfx/svga_escape.h

+1 −1
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ 
 */



#define SVGA_ESCAPE_VMWARE_HINT               0x00030000

#define SVGA_ESCAPE_VMWARE_HINT_FULLSCREEN    0x00030001  // Deprecated

#define SVGA_ESCAPE_VMWARE_HINT_FULLSCREEN    0x00030001  /* Deprecated */



typedef

struct {

drivers/gpu/drm/vmwgfx/svga_overlay.h

+11 −11
Original line number Diff line number Diff line
@@ -38,9 +38,9 @@ 
 * Video formats we support

 */



#define VMWARE_FOURCC_YV12 0x32315659 // 'Y' 'V' '1' '2'

#define VMWARE_FOURCC_YUY2 0x32595559 // 'Y' 'U' 'Y' '2'

#define VMWARE_FOURCC_UYVY 0x59565955 // 'U' 'Y' 'V' 'Y'

#define VMWARE_FOURCC_YV12 0x32315659 /* 'Y' 'V' '1' '2' */

#define VMWARE_FOURCC_YUY2 0x32595559 /* 'Y' 'U' 'Y' '2' */

#define VMWARE_FOURCC_UYVY 0x59565955 /* 'U' 'Y' 'V' 'Y' */



typedef enum {

   SVGA_OVERLAY_FORMAT_INVALID = 0,
@@ -68,7 +68,7 @@ struct SVGAEscapeVideoSetRegs { 
      uint32 streamId;

   } header;



   // May include zero or more items.

   /* May include zero or more items. */

   struct {

      uint32 registerId;

      uint32 value;
@@ -134,12 +134,12 @@ struct { 
 */



static inline bool

VMwareVideoGetAttributes(const SVGAOverlayFormat format,    // IN

                         uint32 *width,                     // IN / OUT

                         uint32 *height,                    // IN / OUT

                         uint32 *size,                      // OUT

                         uint32 *pitches,                   // OUT (optional)

                         uint32 *offsets)                   // OUT (optional)

VMwareVideoGetAttributes(const SVGAOverlayFormat format,    /* IN */

                         uint32 *width,                     /* IN / OUT */

                         uint32 *height,                    /* IN / OUT */

                         uint32 *size,                      /* OUT */

                         uint32 *pitches,                   /* OUT (optional) */

                         uint32 *offsets)                   /* OUT (optional) */

{

    int tmp;
@@ -198,4 +198,4 @@ VMwareVideoGetAttributes(const SVGAOverlayFormat format, // IN 
    return true;

}



#endif // _SVGA_OVERLAY_H_
 
#endif /* _SVGA_OVERLAY_H_ */

CRA Git | Maintained and supported by SUSTech CRA and CCSE