Commit 535ebd42 authored Jan 19, 2016 by Heiko Stuebner

clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-cluster



Both clusters have their mux bit in bit 7 of their respective register.
For whatever reason the big cluster currently lists bit 15 which is
definitly wrong.

Fixes: 3536c97a ("clk: rockchip: add rk3368 clock controller")
Reported-by: Zhang Qing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: zhangqing <zhangqing@rock-chips.com>
Cc: stable@vger.kernel.org

parent ee16bbd2

drivers/clk/rockchip/clk-rk3368.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -165,7 +165,7 @@ static const struct rockchip_cpuclk_reg_data rk3368_cpuclkb_data = {
		.core_reg = RK3368_CLKSEL_CON(0),
		.div_core_shift = 0,
		.div_core_mask = 0x1f,
		.mux_core_shift = 15,
		.mux_core_shift = 7,
		};

		static const struct rockchip_cpuclk_reg_data rk3368_cpuclkl_data = {

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