Commit 5327b5ea authored by Stanislaw Gruszka's avatar Stanislaw Gruszka Committed by Felix Fietkau
Browse files

mt76: unify sta_rate_tbl_update and related helpers 



Use common sta_rate_tbl_update on mt76x0 and mt76x2.
mt76x0 do not have support TPC (transmision power control) implmented,
msta->wcid.max_txpwr_adj is only set for mt76x2.

Signed-off-by: default avatarStanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 212926eb

drivers/net/wireless/mediatek/mt76/mt76.h

+2 −0
Original line number Diff line number Diff line
@@ -247,6 +247,8 @@ struct mt76_driver_ops { 


	void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta,

		       bool ps);

	s8 (*get_max_txpwr_adj)(struct mt76_dev *dev,

				const struct ieee80211_tx_rate *rate);

};



struct mt76_channel_state {

drivers/net/wireless/mediatek/mt76/mt76x0/init.c

+1 −0
Original line number Diff line number Diff line
@@ -493,6 +493,7 @@ struct mt76x0_dev *mt76x0_alloc_device(struct device *pdev) 
	dev = hw->priv;

	dev->mt76.dev = pdev;

	dev->mt76.hw = hw;

	dev->mt76.drv = NULL;

	mutex_init(&dev->usb_ctrl_mtx);

	mutex_init(&dev->reg_atomic_mutex);

	mutex_init(&dev->hw_atomic_mutex);

drivers/net/wireless/mediatek/mt76/mt76x0/mac.c

+1 −62
Original line number Diff line number Diff line
@@ -116,67 +116,6 @@ mt76_mac_fill_tx_status(struct mt76x0_dev *dev, struct ieee80211_tx_info *info, 
		info->flags |= IEEE80211_TX_STAT_ACK;

}



u16 mt76x0_mac_tx_rate_val(struct mt76x0_dev *dev,

			 const struct ieee80211_tx_rate *rate, u8 *nss_val)

{

	u16 rateval;

	u8 phy, rate_idx;

	u8 nss = 1;

	u8 bw = 0;



	if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {

		rate_idx = rate->idx;

		nss = 1 + (rate->idx >> 4);

		phy = MT_PHY_TYPE_VHT;

		if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH)

			bw = 2;

		else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)

			bw = 1;

	} else if (rate->flags & IEEE80211_TX_RC_MCS) {

		rate_idx = rate->idx;

		nss = 1 + (rate->idx >> 3);

		phy = MT_PHY_TYPE_HT;

		if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)

			phy = MT_PHY_TYPE_HT_GF;

		if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)

			bw = 1;

	} else {

		const struct ieee80211_rate *r;

		int band = dev->mt76.chandef.chan->band;

		u16 val;



		r = &dev->mt76.hw->wiphy->bands[band]->bitrates[rate->idx];

		if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)

			val = r->hw_value_short;

		else

			val = r->hw_value;



		phy = val >> 8;

		rate_idx = val & 0xff;

		bw = 0;

	}



	rateval = FIELD_PREP(MT_RXWI_RATE_INDEX, rate_idx);

	rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy);

	rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw);

	if (rate->flags & IEEE80211_TX_RC_SHORT_GI)

		rateval |= MT_RXWI_RATE_SGI;



	*nss_val = nss;

	return cpu_to_le16(rateval);

}



void mt76x0_mac_wcid_set_rate(struct mt76x0_dev *dev, struct mt76_wcid *wcid,

			    const struct ieee80211_tx_rate *rate)

{

	unsigned long flags;



	spin_lock_irqsave(&dev->mt76.lock, flags);

	wcid->tx_rate = mt76x0_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss);

	wcid->tx_rate_set = true;

	spin_unlock_irqrestore(&dev->mt76.lock, flags);

}



struct mt76x02_tx_status mt76x0_mac_fetch_tx_status(struct mt76x0_dev *dev)

{

	struct mt76x02_tx_status stat = {};
@@ -537,7 +476,7 @@ u32 mt76x0_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb, 
	spin_lock_bh(&dev->con_mon_lock);

	if (mt76x0_rx_is_our_beacon(dev, data)) {

		mt76x0_rx_monitor_beacon(dev, rxwi, rate, rssi);

	} else if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_U2M)) {

	} else if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_UNICAST)) {

		if (dev->avg_rssi == 0)

			dev->avg_rssi = rssi;

		else

drivers/net/wireless/mediatek/mt76/mt76x0/mac.h

+0 −59
Original line number Diff line number Diff line
@@ -32,60 +32,6 @@ struct mt76x0_rxwi { 
	__le32 bbp_rxinfo[4];

} __packed __aligned(4);



#define MT_RXINFO_BA			BIT(0)

#define MT_RXINFO_DATA			BIT(1)

#define MT_RXINFO_NULL			BIT(2)

#define MT_RXINFO_FRAG			BIT(3)

#define MT_RXINFO_U2M			BIT(4)

#define MT_RXINFO_MULTICAST		BIT(5)

#define MT_RXINFO_BROADCAST		BIT(6)

#define MT_RXINFO_MYBSS			BIT(7)

#define MT_RXINFO_CRCERR		BIT(8)

#define MT_RXINFO_ICVERR		BIT(9)

#define MT_RXINFO_MICERR		BIT(10)

#define MT_RXINFO_AMSDU			BIT(11)

#define MT_RXINFO_HTC			BIT(12)

#define MT_RXINFO_RSSI			BIT(13)

#define MT_RXINFO_L2PAD			BIT(14)

#define MT_RXINFO_AMPDU			BIT(15)

#define MT_RXINFO_DECRYPT		BIT(16)

#define MT_RXINFO_BSSIDX3		BIT(17)

#define MT_RXINFO_WAPI_KEY		BIT(18)

#define MT_RXINFO_PN_LEN		GENMASK(21, 19)

#define MT_RXINFO_SW_PKT_80211		BIT(22)

#define MT_RXINFO_TCP_SUM_BYPASS	BIT(28)

#define MT_RXINFO_IP_SUM_BYPASS		BIT(29)

#define MT_RXINFO_TCP_SUM_ERR		BIT(30)

#define MT_RXINFO_IP_SUM_ERR		BIT(31)



#define MT_RXWI_CTL_WCID		GENMASK(7, 0)

#define MT_RXWI_CTL_KEY_IDX		GENMASK(9, 8)

#define MT_RXWI_CTL_BSS_IDX		GENMASK(12, 10)

#define MT_RXWI_CTL_UDF			GENMASK(15, 13)

#define MT_RXWI_CTL_MPDU_LEN		GENMASK(27, 16)

#define MT_RXWI_CTL_TID			GENMASK(31, 28)



#define MT_RXWI_FRAG			GENMASK(3, 0)

#define MT_RXWI_SN			GENMASK(15, 4)



#define MT_RXWI_RATE_INDEX		GENMASK(5, 0)

#define MT_RXWI_RATE_LDPC		BIT(6)

#define MT_RXWI_RATE_BW			GENMASK(8, 7)

#define MT_RXWI_RATE_SGI		BIT(9)

#define MT_RXWI_RATE_STBC		BIT(10)

#define MT_RXWI_RATE_LDPC_ETXBF		BIT(11)

#define MT_RXWI_RATE_SND		BIT(12)

#define MT_RXWI_RATE_PHY		GENMASK(15, 13)



#define MT_RATE_INDEX_VHT_IDX		GENMASK(3, 0)

#define MT_RATE_INDEX_VHT_NSS		GENMASK(5, 4)



#define MT_RXWI_GAIN_RSSI_VAL		GENMASK(5, 0)

#define MT_RXWI_GAIN_RSSI_LNA_ID	GENMASK(7, 6)

#define MT_RXWI_ANT_AUX_LNA		BIT(7)



#define MT_RXWI_EANT_ENC_ANT_ID		GENMASK(7, 0)



enum mt76_phy_bandwidth {

	MT_PHY_BW_20,

	MT_PHY_BW_40,
@@ -138,11 +84,6 @@ struct mt76_txwi { 


u32 mt76x0_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb,

			u8 *data, void *rxi);

void mt76x0_mac_wcid_set_rate(struct mt76x0_dev *dev, struct mt76_wcid *wcid,

			    const struct ieee80211_tx_rate *rate);



u16 mt76x0_mac_tx_rate_val(struct mt76x0_dev *dev,

			 const struct ieee80211_tx_rate *rate, u8 *nss_val);

struct mt76x02_tx_status

mt76x0_mac_fetch_tx_status(struct mt76x0_dev *dev);

void mt76x0_send_tx_status(struct mt76x0_dev *dev, struct mt76x02_tx_status *stat, u8 *update);

drivers/net/wireless/mediatek/mt76/mt76x0/main.c

+1 −24
Original line number Diff line number Diff line
@@ -156,29 +156,6 @@ static int mt76x0_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 
	return 0;

}



static void

mt76_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

			 struct ieee80211_sta *sta)

{

	struct mt76x0_dev *dev = hw->priv;

	struct mt76x02_sta *msta = (struct mt76x02_sta *) sta->drv_priv;

	struct ieee80211_sta_rates *rates;

	struct ieee80211_tx_rate rate = {};



	rcu_read_lock();

	rates = rcu_dereference(sta->rates);



	if (!rates)

		goto out;



	rate.idx = rates->rate[0].idx;

	rate.flags = rates->rate[0].flags;

	mt76x0_mac_wcid_set_rate(dev, &msta->wcid, &rate);



out:

	rcu_read_unlock();

}



const struct ieee80211_ops mt76x0_ops = {

	.tx = mt76x0_tx,

	.start = mt76x0_start,
@@ -195,6 +172,6 @@ const struct ieee80211_ops mt76x0_ops = { 
	.sw_scan_start = mt76x0_sw_scan,

	.sw_scan_complete = mt76x0_sw_scan_complete,

	.ampdu_action = mt76x02_ampdu_action,

	.sta_rate_tbl_update = mt76_sta_rate_tbl_update,

	.sta_rate_tbl_update = mt76x02_sta_rate_tbl_update,

	.set_rts_threshold = mt76x0_set_rts_threshold,

};

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