Commit 5310d705 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'ti-k3-dt-for-v5.10' of... 

Merge tag 'ti-k3-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/dt

Device tree updates towards 5.10-rc1 for TI K3 platform.

* tag 'ti-k3-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux: (23 commits)
  arm64: dts: ti: k3-j721e-common-proc-board: Configure the PCIe instances
  arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes
  arm64: dts: ti: k3-*: Fix up node_name_chars_strict warnings
  arm64: dts: ti: k3-am65-wakeup: Use generic temperature-sensor for node name
  arm64: dts: ti: k3-am65-base-board Use generic camera for node name instead of ov5640
  arm64: dts: ti: k3-*: Use generic pinctrl for node names
  arm64: dts: ti: k3-am65*: Use generic clock for syscon clock names
  arm64: dts: ti: k3-am65*: Use generic gpio for node names
  arm64: dts: ti: k3-am65-main: Use lower case hexadecimal
  arm64: dts: ti: k3-j721e: Use lower case hexadecimal
  arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
  arm64: dts: ti: k3-j721e-som-p0: Reserve memory for IPC between RTOS cores
  arm64: dts: ti: k3-j721e-som-p0: Add DDR carveout memory nodes for C71x DSP
  arm64: dts: ti: k3-j721e-som-p0: Add mailboxes to C71x DSP
  arm64: dts: ti: k3-j721e-main: Add C71x DSP node
  arm64: dts: ti: k3-j721e-som-p0: Add DDR carveout memory nodes for C66 DSPs
  arm64: dts: ti: k3-j721e-som-p0: Add mailboxes to C66x DSPs
  arm64: dts: ti: k3-j721e-main: Add C66x DSP nodes
  arm64: dts: ti: k3-j721e-som-p0: Move mailbox nodes from board dts file
  arm64: dts: ti: k3-j721e-main: Add crypto accelerator node
  ...

Link: https://lore.kernel.org/r/20200922134722.2y5kqxu4lghbwp5u@akan


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 12f0f6f6 66db854b

arch/arm64/boot/dts/ti/k3-am65-main.dtsi

+37 −15
Original line number Diff line number Diff line
@@ -112,7 +112,29 @@ 
		power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;

	};



	main_pmx0: pinmux@11c000 {

	crypto: crypto@4e00000 {

		compatible = "ti,am654-sa2ul";

		reg = <0x0 0x4e00000 0x0 0x1200>;

		power-domains = <&k3_pds 136 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <2>;

		#size-cells = <2>;

		ranges = <0x0 0x04e00000 0x00 0x04e00000 0x0 0x30000>;

		status = "okay";



		dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,

				<&main_udmap 0x4001>;

		dma-names = "tx", "rx1", "rx2";

		dma-coherent;



		rng: rng@4e10000 {

			compatible = "inside-secure,safexcel-eip76";

			reg = <0x0 0x4e10000 0x0 0x7d>;

			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&k3_clks 136 1>;

		};

	};



	main_pmx0: pinctrl@11c000 {

		compatible = "pinctrl-single";

		reg = <0x0 0x11c000 0x0 0x2e4>;

		#pinctrl-cells = <1>;
@@ -120,7 +142,7 @@ 
		pinctrl-single,function-mask = <0xffffffff>;

	};



	main_pmx1: pinmux@11c2e8 {

	main_pmx1: pinctrl@11c2e8 {

		compatible = "pinctrl-single";

		reg = <0x0 0x11c2e8 0x0 0x24>;

		#pinctrl-cells = <1>;
@@ -283,7 +305,7 @@ 
		no-1-8-v;

	};



	scm_conf: scm_conf@100000 {

	scm_conf: scm-conf@100000 {

		compatible = "syscon", "simple-mfd";

		reg = <0 0x00100000 0 0x1c000>;

		#address-cells = <1>;
@@ -305,12 +327,12 @@ 
			reg = <0x00000210 0x4>;

		};



		serdes0_clk: serdes_clk@4080 {

		serdes0_clk: clock@4080 {

			compatible = "syscon";

			reg = <0x00004080 0x4>;

		};



		serdes1_clk: serdes_clk@4090 {

		serdes1_clk: clock@4090 {

			compatible = "syscon";

			reg = <0x00004090 0x4>;

		};
@@ -322,12 +344,12 @@ 
					<0x4090 0x3>; /* SERDES1 lane select */

		};



		dss_oldi_io_ctrl: dss_oldi_io_ctrl@41E0 {

		dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {

			compatible = "syscon";

			reg = <0x0000041E0 0x14>;

			reg = <0x0000041e0 0x14>;

		};



		ehrpwm_tbclk: syscon@4140 {

		ehrpwm_tbclk: clock@4140 {

			compatible = "ti,am654-ehrpwm-tbclk", "syscon";

			reg = <0x4140 0x18>;

			#clock-cells = <1>;
@@ -423,7 +445,7 @@ 
		ti,interrupt-ranges = <0 392 32>;

	};



	main_navss {

	main-navss {

		compatible = "simple-mfd";

		#address-cells = <2>;

		#size-cells = <2>;
@@ -639,7 +661,7 @@ 
		};

	};



	main_gpio0:  main_gpio0@600000 {

	main_gpio0: gpio@600000 {

		compatible = "ti,am654-gpio", "ti,keystone-gpio";

		reg = <0x0 0x600000 0x0 0x100>;

		gpio-controller;
@@ -654,7 +676,7 @@ 
		clock-names = "gpio";

	};



	main_gpio1:  main_gpio1@601000 {

	main_gpio1: gpio@601000 {

		compatible = "ti,am654-gpio", "ti,keystone-gpio";

		reg = <0x0 0x601000 0x0 0x100>;

		gpio-controller;
@@ -682,7 +704,7 @@ 
		ti,syscon-pcie-mode = <&pcie0_mode>;

		bus-range = <0x0 0xff>;

		num-viewport = <16>;

		max-link-speed = <3>;

		max-link-speed = <2>;

		dma-coherent;

		interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;

		msi-map = <0x0 &gic_its 0x0 0x10000>;
@@ -696,7 +718,7 @@ 
		ti,syscon-pcie-mode = <&pcie0_mode>;

		num-ib-windows = <16>;

		num-ob-windows = <16>;

		max-link-speed = <3>;

		max-link-speed = <2>;

		dma-coherent;

		interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;

	};
@@ -714,7 +736,7 @@ 
		ti,syscon-pcie-mode = <&pcie1_mode>;

		bus-range = <0x0 0xff>;

		num-viewport = <16>;

		max-link-speed = <3>;

		max-link-speed = <2>;

		dma-coherent;

		interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;

		msi-map = <0x0 &gic_its 0x10000 0x10000>;
@@ -728,7 +750,7 @@ 
		ti,syscon-pcie-mode = <&pcie1_mode>;

		num-ib-windows = <16>;

		num-ob-windows = <16>;

		max-link-speed = <3>;

		max-link-speed = <2>;

		dma-coherent;

		interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;

	};

arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ 
 */



&cbass_mcu {

	mcu_conf: scm_conf@40f00000 {

	mcu_conf: scm-conf@40f00000 {

		compatible = "syscon", "simple-mfd";

		reg = <0x0 0x40f00000 0x0 0x20000>;

		#address-cells = <1>;
@@ -116,7 +116,7 @@ 
		};

	};



	mcu_navss {

	mcu-navss {

		compatible = "simple-mfd";

		#address-cells = <2>;

		#size-cells = <2>;

arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ 
		reg = <0x43000014 0x4>;

	};



	wkup_pmx0: pinmux@4301c000 {

	wkup_pmx0: pinctrl@4301c000 {

		compatible = "pinctrl-single";

		reg = <0x4301c000 0x118>;

		#pinctrl-cells = <1>;
@@ -80,7 +80,7 @@ 
		ti,interrupt-ranges = <0 712 16>;

	};



	wkup_gpio0: wkup_gpio0@42110000 {

	wkup_gpio0: gpio@42110000 {

		compatible = "ti,am654-gpio", "ti,keystone-gpio";

		reg = <0x42110000 0x100>;

		gpio-controller;
@@ -95,7 +95,7 @@ 
		clock-names = "gpio";

	};



	wkup_vtm0: thermal@42050000 {

	wkup_vtm0: temperature-sensor@42050000 {

		compatible = "ti,am654-vtm";

		reg = <0x42050000 0x25c>;

		power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;

arch/arm64/boot/dts/ti/k3-am65.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ 
		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;

	};



	cbass_main: interconnect@100000 {

	cbass_main: bus@100000 {

		compatible = "simple-bus";

		#address-cells = <2>;

		#size-cells = <2>;
@@ -88,7 +88,7 @@ 
			 <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>,

			 <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>;



		cbass_mcu: interconnect@28380000 {

		cbass_mcu: bus@28380000 {

			compatible = "simple-bus";

			#address-cells = <2>;

			#size-cells = <2>;
@@ -106,7 +106,7 @@ 
				 <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, /* FSS OSPI0 data region 3*/

				 <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; /* FSS OSPI1 data region 3*/



			cbass_wakeup: interconnect@42040000 {

			cbass_wakeup: bus@42040000 {

				compatible = "simple-bus";

				#address-cells = <1>;

				#size-cells = <1>;

arch/arm64/boot/dts/ti/k3-am654-base-board.dts

+9 −9
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ 
		#address-cells = <2>;

		#size-cells = <2>;

		ranges;

		secure_ddr: secure_ddr@9e800000 {

		secure_ddr: secure-ddr@9e800000 {

			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */

			alignment = <0x1000>;

			no-map;
@@ -70,14 +70,14 @@ 
		>;

	};



	push_button_pins_default: push_button__pins_default {

	push_button_pins_default: push-button-pins-default {

		pinctrl-single,pins = <

			AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */

			AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */

		>;

	};



	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {

	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {

		pinctrl-single,pins = <

			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */

			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)	 /* (U2) MCU_OSPI0_DQS */
@@ -93,13 +93,13 @@ 
		>;

	};



	wkup_pca554_default: wkup_pca554_default {

	wkup_pca554_default: wkup-pca554-default {

		pinctrl-single,pins = <

			AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */

		>;

	};



	mcu_cpsw_pins_default: mcu_cpsw_pins_default {

	mcu_cpsw_pins_default: mcu-cpsw-pins-default {

		pinctrl-single,pins = <

			AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */

			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
@@ -116,7 +116,7 @@ 
		>;

	};



	mcu_mdio_pins_default: mcu_mdio1_pins_default {

	mcu_mdio_pins_default: mcu-mdio1-pins-default {

		pinctrl-single,pins = <

			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */

			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
@@ -167,7 +167,7 @@ 
		>;

	};



	main_mmc1_pins_default: main_mmc1_pins_default {

	main_mmc1_pins_default: main-mmc1-pins-default {

		pinctrl-single,pins = <

			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */

			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
@@ -180,7 +180,7 @@ 
		>;

	};



	usb1_pins_default: usb1_pins_default {

	usb1_pins_default: usb1-pins-default {

		pinctrl-single,pins = <

			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */

		>;
@@ -257,7 +257,7 @@ 
	pinctrl-0 = <&main_i2c1_pins_default>;

	clock-frequency = <400000>;



	ov5640@3c {

	ov5640: camera@3c {

		compatible = "ovti,ov5640";

		reg = <0x3c>;

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