Commit 52eb6d31 authored by Wu Hao's avatar Wu Hao Committed by Greg Kroah-Hartman
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fpga: dfl: fme: add capability sysfs interfaces



This patch adds 3 read-only sysfs interfaces for FPGA Management Engine
(FME) block for capabilities including cache_size, fabric_version and
socket_id.

Signed-off-by: default avatarLuwei Kang <luwei.kang@intel.com>
Signed-off-by: default avatarXu Yilun <yilun.xu@intel.com>
Signed-off-by: default avatarWu Hao <hao.wu@intel.com>
Acked-by: default avatarAlan Tull <atull@kernel.org>
Signed-off-by: default avatarMoritz Fischer <mdf@kernel.org>
Link: https://lore.kernel.org/r/1564914022-3710-11-git-send-email-hao.wu@intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 3c51ff77
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+23 −0
Original line number Diff line number Diff line
@@ -21,3 +21,26 @@ Contact: Wu Hao <hao.wu@intel.com>
Description:	Read-only. It returns Bitstream (static FPGA region) meta
		data, which includes the synthesis date, seed and other
		information of this static FPGA region.

What:		/sys/bus/platform/devices/dfl-fme.0/cache_size
Date:		August 2019
KernelVersion:  5.4
Contact:	Wu Hao <hao.wu@intel.com>
Description:	Read-only. It returns cache size of this FPGA device.

What:		/sys/bus/platform/devices/dfl-fme.0/fabric_version
Date:		August 2019
KernelVersion:  5.4
Contact:	Wu Hao <hao.wu@intel.com>
Description:	Read-only. It returns fabric version of this FPGA device.
		Userspace applications need this information to select
		best data channels per different fabric design.

What:		/sys/bus/platform/devices/dfl-fme.0/socket_id
Date:		August 2019
KernelVersion:  5.4
Contact:	Wu Hao <hao.wu@intel.com>
Description:	Read-only. It returns socket_id to indicate which socket
		this FPGA belongs to, only valid for integrated solution.
		User only needs this information, in case standard numa node
		can't provide correct information.
+48 −0
Original line number Diff line number Diff line
@@ -73,10 +73,58 @@ static ssize_t bitstream_metadata_show(struct device *dev,
}
static DEVICE_ATTR_RO(bitstream_metadata);

static ssize_t cache_size_show(struct device *dev,
			       struct device_attribute *attr, char *buf)
{
	void __iomem *base;
	u64 v;

	base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER);

	v = readq(base + FME_HDR_CAP);

	return sprintf(buf, "%u\n",
		       (unsigned int)FIELD_GET(FME_CAP_CACHE_SIZE, v));
}
static DEVICE_ATTR_RO(cache_size);

static ssize_t fabric_version_show(struct device *dev,
				   struct device_attribute *attr, char *buf)
{
	void __iomem *base;
	u64 v;

	base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER);

	v = readq(base + FME_HDR_CAP);

	return sprintf(buf, "%u\n",
		       (unsigned int)FIELD_GET(FME_CAP_FABRIC_VERID, v));
}
static DEVICE_ATTR_RO(fabric_version);

static ssize_t socket_id_show(struct device *dev,
			      struct device_attribute *attr, char *buf)
{
	void __iomem *base;
	u64 v;

	base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER);

	v = readq(base + FME_HDR_CAP);

	return sprintf(buf, "%u\n",
		       (unsigned int)FIELD_GET(FME_CAP_SOCKET_ID, v));
}
static DEVICE_ATTR_RO(socket_id);

static struct attribute *fme_hdr_attrs[] = {
	&dev_attr_ports_num.attr,
	&dev_attr_bitstream_id.attr,
	&dev_attr_bitstream_metadata.attr,
	&dev_attr_cache_size.attr,
	&dev_attr_fabric_version.attr,
	&dev_attr_socket_id.attr,
	NULL,
};
ATTRIBUTE_GROUPS(fme_hdr);