Commit 52bd138d authored by Afzal Mohammed's avatar Afzal Mohammed Committed by Tony Lindgren
Browse files

ARM: OMAP2+: gpmc: update nand register helper 



Provide helper function for updating NAND register details for
the necessary chip select. NAND drivers platform data can be
updated with this information so that NAND driver can handle
GPMC NAND operations by itself.

Signed-off-by: default avatarAfzal Mohammed <afzal@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent fea7a08a

arch/arm/mach-omap2/gpmc.c

+20 −0
Original line number Diff line number Diff line
@@ -682,6 +682,26 @@ int gpmc_prefetch_reset(int cs) 
}

EXPORT_SYMBOL(gpmc_prefetch_reset);



void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)

{

	reg->gpmc_status = gpmc_base + GPMC_STATUS;

	reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET +

				GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;

	reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET +

				GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs;

	reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET +

				GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs;

	reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1;

	reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2;

	reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL;

	reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS;

	reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG;

	reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL;

	reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG;

	reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT;

	reg->gpmc_bch_result0 = gpmc_base + GPMC_ECC_BCH_RESULT_0;

}



static void __init gpmc_mem_init(void)

{

	int cs;

arch/arm/plat-omap/include/plat/gpmc.h

+18 −0
Original line number Diff line number Diff line
@@ -133,6 +133,24 @@ struct gpmc_timings { 
	u16 wr_data_mux_bus;	/* WRDATAONADMUXBUS */

};



struct gpmc_nand_regs {

	void __iomem	*gpmc_status;

	void __iomem	*gpmc_nand_command;

	void __iomem	*gpmc_nand_address;

	void __iomem	*gpmc_nand_data;

	void __iomem	*gpmc_prefetch_config1;

	void __iomem	*gpmc_prefetch_config2;

	void __iomem	*gpmc_prefetch_control;

	void __iomem	*gpmc_prefetch_status;

	void __iomem	*gpmc_ecc_config;

	void __iomem	*gpmc_ecc_control;

	void __iomem	*gpmc_ecc_size_config;

	void __iomem	*gpmc_ecc1_result;

	void __iomem	*gpmc_bch_result0;

};



extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);



extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns);

extern unsigned int gpmc_ps_to_ticks(unsigned int time_ps);

extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);

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