Commit 52bc5ea6 authored by Ulrich Hecht's avatar Ulrich Hecht Committed by Geert Uytterhoeven
Browse files

clk: renesas: rzg2: Mark RWDT clocks as critical 



Ensures RWDT remains alert throughout the boot process if enabled.

This patch applies the change to the following SoCs: r8a774a1,
r8a774b1 and r8a774c0.

Signed-off-by: default avatarUlrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20200616162626.27944-4-uli+renesas@fpond.eu


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent f23f1101

drivers/clk/renesas/r8a774a1-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -237,6 +237,7 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = { 
};



static const unsigned int r8a774a1_crit_mod_clks[] __initconst = {

	MOD_CLK_ID(402),	/* RWDT */

	MOD_CLK_ID(408),	/* INTC-AP (GIC) */

};

drivers/clk/renesas/r8a774b1-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -233,6 +233,7 @@ static const struct mssr_mod_clk r8a774b1_mod_clks[] __initconst = { 
};



static const unsigned int r8a774b1_crit_mod_clks[] __initconst = {

	MOD_CLK_ID(402),	/* RWDT */

	MOD_CLK_ID(408),	/* INTC-AP (GIC) */

};

drivers/clk/renesas/r8a774c0-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -238,6 +238,7 @@ static const struct mssr_mod_clk r8a774c0_mod_clks[] __initconst = { 
};



static const unsigned int r8a774c0_crit_mod_clks[] __initconst = {

	MOD_CLK_ID(402),	/* RWDT */

	MOD_CLK_ID(408),	/* INTC-AP (GIC) */

};

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