Commit 529284a0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 4263/1: fix IXP4XX_NPE[ABC]_BASE_VIRT address
  [ARM] 4256/1: i.MX/MX1 SDHC fix/workaround of SD card recognition problems
  [ARM] 4255/1: i.MX/MX1 Correct MPU PLL reference clock value.
  [ARM] 4254/1: i.MX/MX1 CPU Frequency scaling honor boot loader set BCLK_DIV.
  [ARM] 4251/1: Fix sharpsl_pm dependency
  [ARM] 4250/1: Fix locomo backlight conversion error/compile failure
  [ARM] 4249/1: Fix tosa compile failure
  [ARM] 4248/1: lh7a40x: fix missing definitions for get_irqnr_preamble
  [ARM] 4247/1: Fix long name for cc9p9360dev
  ARM: OMAP: Fix OMAP2 dss2 so clk_set_parent works
  ARM: OMAP: Fix missing workqueue include in board-h2.c
  ARM: OMAP: Include missing header
parents be521466 1dee7908

arch/arm/common/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ config SHARP_PARAM 


config SHARPSL_PM

	bool

	select APM_EMULATION



config SHARP_SCOOP

	bool

arch/arm/mach-imx/cpufreq.c

+9 −6
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ 
#define CR_920T_ASYNC_MODE	0xC0000000



static u32 mpctl0_at_boot;

static u32 bclk_div_at_boot;



static void imx_set_async_mode(void)

{
@@ -82,13 +83,13 @@ static void imx_set_mpctl0(u32 mpctl0) 
 * imx_compute_mpctl - compute new PLL parameters

 * @new_mpctl:	pointer to location assigned by new PLL control register value

 * @cur_mpctl:	current PLL control register parameters

 * @f_ref:	reference source frequency Hz

 * @freq:	required frequency in Hz

 * @relation:	is one of %CPUFREQ_RELATION_L (supremum)

 *		and %CPUFREQ_RELATION_H (infimum)

 */

long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, unsigned long freq, int relation)

long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, u32 f_ref, unsigned long freq, int relation)

{

        u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);

        u32 mfi;

        u32 mfn;

        u32 mfd;
@@ -182,7 +183,7 @@ static int imx_set_target(struct cpufreq_policy *policy, 
	unsigned long flags;

	long freq;

	long sysclk;

	unsigned int bclk_div = 1;

	unsigned int bclk_div = bclk_div_at_boot;



	/*

	 * Some governors do not respects CPU and policy lower limits
@@ -202,8 +203,8 @@ static int imx_set_target(struct cpufreq_policy *policy, 


	sysclk = imx_get_system_clk();



	if (freq > sysclk + 1000000) {

		freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, freq, relation);

	if (freq > sysclk / bclk_div_at_boot + 1000000) {

		freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, CLK32 * 512, freq, relation);

		if (freq < 0) {

			printk(KERN_WARNING "imx: target frequency %ld Hz cannot be set\n", freq);

			return -EINVAL;
@@ -217,6 +218,8 @@ static int imx_set_target(struct cpufreq_policy *policy, 


			if(bclk_div > 16)

				bclk_div = 16;

			if(bclk_div < bclk_div_at_boot)

				bclk_div = bclk_div_at_boot;

		}

		freq = (sysclk + bclk_div / 2) / bclk_div;

	}
@@ -285,7 +288,7 @@ static struct cpufreq_driver imx_driver = { 


static int __init imx_cpufreq_init(void)

{



	bclk_div_at_boot = __mfld2val(CSCR_BCLK_DIV, CSCR) + 1;

	mpctl0_at_boot = 0;



	if((CSCR & CSCR_MPEN) &&

arch/arm/mach-imx/generic.c

+5 −4
Original line number Diff line number Diff line
@@ -102,7 +102,7 @@ EXPORT_SYMBOL(imx_gpio_mode); 
 *  f = 2 * f_ref * --------------------

 *                        pd + 1

 */

static unsigned int imx_decode_pll(unsigned int pll)

static unsigned int imx_decode_pll(unsigned int pll, u32 f_ref)

{

	unsigned long long ll;

	unsigned long quot;
@@ -111,7 +111,6 @@ static unsigned int imx_decode_pll(unsigned int pll) 
	u32 mfn = pll & 0x3ff;

	u32 mfd = (pll >> 16) & 0x3ff;

	u32 pd =  (pll >> 26) & 0xf;

	u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);



	mfi = mfi <= 5 ? 5 : mfi;
@@ -124,13 +123,15 @@ static unsigned int imx_decode_pll(unsigned int pll) 


unsigned int imx_get_system_clk(void)

{

	return imx_decode_pll(SPCTL0);

	u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);



	return imx_decode_pll(SPCTL0, f_ref);

}

EXPORT_SYMBOL(imx_get_system_clk);



unsigned int imx_get_mcu_clk(void)

{

	return imx_decode_pll(MPCTL0);

	return imx_decode_pll(MPCTL0, CLK32 * 512);

}

EXPORT_SYMBOL(imx_get_mcu_clk);

arch/arm/mach-ns9xxx/mach-cc9p9360dev.c

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ static void __init mach_cc9p9360dev_init_machine(void) 
	board_a9m9750dev_init_machine();

}



MACHINE_START(CC9P9360DEV, "Connect Core 9P 9360 on an A9M9750 Devboard")

MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an A9M9750 Devboard")

	.map_io = mach_cc9p9360dev_map_io,

	.init_irq = mach_cc9p9360dev_init_irq,

	.init_machine = mach_cc9p9360dev_init_machine,

arch/arm/mach-omap1/board-h2.c

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include <linux/mtd/nand.h>

#include <linux/mtd/partitions.h>

#include <linux/input.h>

#include <linux/workqueue.h>



#include <asm/hardware.h>

#include <asm/mach-types.h>

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