Commit 5260c2b8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-5.4/libata-2019-09-15' of git://git.kernel.dk/linux-block 

Pull libata updates from Jens Axboe:

 - Kill unused export (Andy)

 - Use dma_set_mask_and_coherent() throughout (Christoph)

 - Drop PCS quirk on Denverton, which has different register layout
   (Dan)

 - Support non-boot time detection for pata_buddha (Max)

* tag 'for-5.4/libata-2019-09-15' of git://git.kernel.dk/linux-block:
  libata/ahci: Drop PCS quirk for Denverton and beyond
  ahci: Do not export local variable ahci_em_messages
  libata: switch remaining drivers to use dma_set_mask_and_coherent
  sata_sil24: use dma_set_mask_and_coherent
  sata_qstor: use dma_set_mask_and_coherent
  sata_nv: use dma_set_mask_and_coherent
  sata_mv: use dma_set_mask_and_coherent
  pdc_adma: use dma_set_mask_and_coherent
  ahci: use dma_set_mask_and_coherent
  acard_ahci: use dma_set_mask_and_coherent
  ata/pata_buddha: Probe via modalias instead of initcall
parents 1e6fa3a3 c312ef17

drivers/ata/acard-ahci.c

+5 −33
Original line number Diff line number Diff line
@@ -160,37 +160,6 @@ static int acard_ahci_pci_device_resume(struct pci_dev *pdev) 
}

#endif



static int acard_ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)

{

	int rc;



	if (using_dac &&

	    !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {

		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));

		if (rc) {

			rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));

			if (rc) {

				dev_err(&pdev->dev,

					   "64-bit DMA enable failed\n");

				return rc;

			}

		}

	} else {

		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));

		if (rc) {

			dev_err(&pdev->dev, "32-bit DMA enable failed\n");

			return rc;

		}

		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));

		if (rc) {

			dev_err(&pdev->dev,

				"32-bit consistent DMA enable failed\n");

			return rc;

		}

	}

	return 0;

}



static void acard_ahci_pci_print_info(struct ata_host *host)

{

	struct pci_dev *pdev = to_pci_dev(host->dev);
@@ -471,9 +440,12 @@ static int acard_ahci_init_one(struct pci_dev *pdev, const struct pci_device_id 
	}



	/* initialize adapter */

	rc = acard_ahci_configure_dma_masks(pdev, hpriv->cap & HOST_CAP_64);

	if (rc)

	rc = dma_set_mask_and_coherent(&pdev->dev,

			DMA_BIT_MASK((hpriv->cap & HOST_CAP_64) ? 64 : 32));

	if (rc) {

		dev_err(&pdev->dev, "DMA enable failed\n");

		return rc;

	}



	rc = ahci_reset_controller(host);

	if (rc)

drivers/ata/ahci.c

+77 −72
Original line number Diff line number Diff line
@@ -65,6 +65,12 @@ enum board_ids { 
	board_ahci_sb700,	/* for SB700 and SB800 */

	board_ahci_vt8251,



	/*

	 * board IDs for Intel chipsets that support more than 6 ports

	 * *and* end up needing the PCS quirk.

	 */

	board_ahci_pcs7,



	/* aliases */

	board_ahci_mcp_linux	= board_ahci_mcp65,

	board_ahci_mcp67	= board_ahci_mcp65,
@@ -220,6 +226,12 @@ static const struct ata_port_info ahci_port_info[] = { 
		.udma_mask	= ATA_UDMA6,

		.port_ops	= &ahci_vt8251_ops,

	},

	[board_ahci_pcs7] = {

		.flags		= AHCI_FLAG_COMMON,

		.pio_mask	= ATA_PIO4,

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &ahci_ops,

	},

};



static const struct pci_device_id ahci_pci_tbl[] = {
@@ -264,26 +276,26 @@ static const struct pci_device_id ahci_pci_tbl[] = { 
	{ PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */

	{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_mobile }, /* PCH M RAID */

	{ PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b0), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b1), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b2), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b3), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b4), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b5), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b6), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b7), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19bE), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19bF), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c0), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c1), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c2), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c3), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c4), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c5), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c6), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c7), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19cE), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19cF), board_ahci }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b0), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b1), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b2), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b3), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b4), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b5), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b6), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19b7), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19bE), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19bF), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c0), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c1), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c2), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c3), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c4), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c5), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c6), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19c7), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19cE), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x19cF), board_ahci_pcs7 }, /* DNV AHCI */

	{ PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */

	{ PCI_VDEVICE(INTEL, 0x1c03), board_ahci_mobile }, /* CPT M AHCI */

	{ PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
@@ -623,30 +635,6 @@ static void ahci_pci_save_initial_config(struct pci_dev *pdev, 
	ahci_save_initial_config(&pdev->dev, hpriv);

}



static int ahci_pci_reset_controller(struct ata_host *host)

{

	struct pci_dev *pdev = to_pci_dev(host->dev);

	int rc;



	rc = ahci_reset_controller(host);

	if (rc)

		return rc;



	if (pdev->vendor == PCI_VENDOR_ID_INTEL) {

		struct ahci_host_priv *hpriv = host->private_data;

		u16 tmp16;



		/* configure PCS */

		pci_read_config_word(pdev, 0x92, &tmp16);

		if ((tmp16 & hpriv->port_map) != hpriv->port_map) {

			tmp16 |= hpriv->port_map;

			pci_write_config_word(pdev, 0x92, tmp16);

		}

	}



	return 0;

}



static void ahci_pci_init_controller(struct ata_host *host)

{

	struct ahci_host_priv *hpriv = host->private_data;
@@ -849,7 +837,7 @@ static int ahci_pci_device_runtime_resume(struct device *dev) 
	struct ata_host *host = pci_get_drvdata(pdev);

	int rc;



	rc = ahci_pci_reset_controller(host);

	rc = ahci_reset_controller(host);

	if (rc)

		return rc;

	ahci_pci_init_controller(host);
@@ -884,7 +872,7 @@ static int ahci_pci_device_resume(struct device *dev) 
		ahci_mcp89_apple_enable(pdev);



	if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {

		rc = ahci_pci_reset_controller(host);

		rc = ahci_reset_controller(host);

		if (rc)

			return rc;
@@ -901,41 +889,24 @@ static int ahci_pci_device_resume(struct device *dev) 


static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)

{

	const int dma_bits = using_dac ? 64 : 32;

	int rc;



	/*

	 * If the device fixup already set the dma_mask to some non-standard

	 * value, don't extend it here. This happens on STA2X11, for example.

	 *

	 * XXX: manipulating the DMA mask from platform code is completely

	 * bogus, platform code should use dev->bus_dma_mask instead..

	 */

	if (pdev->dma_mask && pdev->dma_mask < DMA_BIT_MASK(32))

		return 0;



	if (using_dac &&

	    !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {

		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));

		if (rc) {

			rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));

			if (rc) {

				dev_err(&pdev->dev,

					"64-bit DMA enable failed\n");

				return rc;

			}

		}

	} else {

		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));

		if (rc) {

			dev_err(&pdev->dev, "32-bit DMA enable failed\n");

			return rc;

		}

		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));

		if (rc) {

			dev_err(&pdev->dev,

				"32-bit consistent DMA enable failed\n");

	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits));

	if (rc)

		dev_err(&pdev->dev, "DMA enable failed\n");

	return rc;

}

	}

	return 0;

}



static void ahci_pci_print_info(struct ata_host *host)

{
@@ -1619,6 +1590,34 @@ update_policy: 
		ap->target_lpm_policy = policy;

}



static void ahci_intel_pcs_quirk(struct pci_dev *pdev, struct ahci_host_priv *hpriv)

{

	const struct pci_device_id *id = pci_match_id(ahci_pci_tbl, pdev);

	u16 tmp16;



	/*

	 * Only apply the 6-port PCS quirk for known legacy platforms.

	 */

	if (!id || id->vendor != PCI_VENDOR_ID_INTEL)

		return;

	if (((enum board_ids) id->driver_data) < board_ahci_pcs7)

		return;



	/*

	 * port_map is determined from PORTS_IMPL PCI register which is

	 * implemented as write or write-once register.  If the register

	 * isn't programmed, ahci automatically generates it from number

	 * of ports, which is good enough for PCS programming. It is

	 * otherwise expected that platform firmware enables the ports

	 * before the OS boots.

	 */

	pci_read_config_word(pdev, PCS_6, &tmp16);

	if ((tmp16 & hpriv->port_map) != hpriv->port_map) {

		tmp16 |= hpriv->port_map;

		pci_write_config_word(pdev, PCS_6, tmp16);

	}

}



static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)

{

	unsigned int board_id = ent->driver_data;
@@ -1731,6 +1730,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 
	/* save initial config */

	ahci_pci_save_initial_config(pdev, hpriv);



	/*

	 * If platform firmware failed to enable ports, try to enable

	 * them here.

	 */

	ahci_intel_pcs_quirk(pdev, hpriv);



	/* prepare host */

	if (hpriv->cap & HOST_CAP_NCQ) {

		pi.flags |= ATA_FLAG_NCQ;
@@ -1840,7 +1845,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 
	if (rc)

		return rc;



	rc = ahci_pci_reset_controller(host);

	rc = ahci_reset_controller(host);

	if (rc)

		return rc;

drivers/ata/ahci.h

+2 −0
Original line number Diff line number Diff line
@@ -247,6 +247,8 @@ enum { 
					  ATA_FLAG_ACPI_SATA | ATA_FLAG_AN,



	ICH_MAP				= 0x90, /* ICH MAP register */

	PCS_6				= 0x92, /* 6 port PCS */

	PCS_7				= 0x94, /* 7+ port PCS (Denverton) */



	/* em constants */

	EM_MAX_SLOTS			= 8,

drivers/ata/libahci.c

+0 −1
Original line number Diff line number Diff line
@@ -175,7 +175,6 @@ struct ata_port_operations ahci_pmp_retry_srst_ops = { 
EXPORT_SYMBOL_GPL(ahci_pmp_retry_srst_ops);



static bool ahci_em_messages __read_mostly = true;

EXPORT_SYMBOL_GPL(ahci_em_messages);

module_param(ahci_em_messages, bool, 0444);

/* add other LED protocol types when they become supported */

MODULE_PARM_DESC(ahci_em_messages,

drivers/ata/libata-sff.c

+1 −7
Original line number Diff line number Diff line
@@ -3153,15 +3153,9 @@ void ata_pci_bmdma_init(struct ata_host *host) 
	 * ->sff_irq_clear method.  Try to initialize bmdma_addr

	 * regardless of dma masks.

	 */

	rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);

	rc = dma_set_mask_and_coherent(&pdev->dev, ATA_DMA_MASK);

	if (rc)

		ata_bmdma_nodma(host, "failed to set dma mask");

	if (!rc) {

		rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);

		if (rc)

			ata_bmdma_nodma(host,

					"failed to set consistent dma mask");

	}



	/* request and iomap DMA region */

	rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));

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