ARM: dts: exynos: Correct USB3503 GPIOs polarity (5206265f) · Commits · 戴 / test

Current USB3503 driver ignores GPIO polarity and always operates as if the GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing USB3503 chip applications to match the chip specification and common convention for naming the pins. The only pin, which has to be ACTIVE_LOW is the reset pin. The remaining are ACTIVE_HIGH. This change allows later to fix the USB3503 driver to properly use generic GPIO bindings and read polarity from DT. Signed-off-by:

Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:

Krzysztof Kozlowski <krzk@kernel.org>

arch/arm/boot/dts/exynos4412-odroid-common.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -267,7 +267,7 @@

		intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
		connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
		initial-mode = <1>;
		};

arch/arm/boot/dts/exynos5250-arndale.dts

+1 −1

Original line number	Diff line number	Diff line
		@@ -154,7 +154,7 @@
		compatible = "smsc,usb3503a";

		reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
		connect-gpios = <&gpd1 7 GPIO_ACTIVE_LOW>;
		connect-gpios = <&gpd1 7 GPIO_ACTIVE_HIGH>;
		};
		};

arch/arm/boot/dts/exynos5410-odroidxu.dts

+1 −1

Original line number	Diff line number	Diff line
		@@ -170,7 +170,7 @@

		intn-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>;
		connect-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpx1 4 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpx1 4 GPIO_ACTIVE_LOW>;
		initial-mode = <1>;

		clock-names = "refclk";

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