x86/mce: Init some CPU features early (5204bf17) · Commits · 戴 / test

When the MCA banks in __mcheck_cpu_init_generic() are polled for leftover errors logged during boot or from the previous boot, its required to have CPU features detected sufficiently so that the reading out and handling of those early errors is done correctly. If those features are not available, the decoding may miss some information and get incomplete errors logged. For example, on SMCA systems the MCA_IPID and MCA_SYND registers are not logged and MCA_ADDR is not masked appropriately. To cure that, do a subset of the basic feature detection early while the rest happens in its usual place in __mcheck_cpu_init_vendor(). Signed-off-by:

Yazen Ghannam <Yazen.Ghannam@amd.com> Cc: Tony Luck <tony.luck@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: x86-ml <x86@kernel.org> Link: http://lkml.kernel.org/r/1489599055-20756-1-git-send-email-Yazen.Ghannam@amd.com [ Massage commit message and simplify. ] Signed-off-by:

Borislav Petkov <bp@suse.de> Signed-off-by:

Thomas Gleixner <tglx@linutronix.de>

arch/x86/kernel/cpu/mcheck/mce.c

+18 −12

Original line number	Diff line number	Diff line
		@@ -1702,30 +1702,35 @@ static int __mcheck_cpu_ancient_init(struct cpuinfo_x86 *c)
		return 0;
		}

		static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
		/*
		* Init basic CPU features needed for early decoding of MCEs.
		*/
		static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c)
		{
		switch (c->x86_vendor) {
		case X86_VENDOR_INTEL:
		mce_intel_feature_init(c);
		mce_adjust_timer = cmci_intel_adjust_timer;
		break;

		case X86_VENDOR_AMD: {
		if (c->x86_vendor == X86_VENDOR_AMD) {
		mce_flags.overflow_recov = !!cpu_has(c, X86_FEATURE_OVERFLOW_RECOV);
		mce_flags.succor = !!cpu_has(c, X86_FEATURE_SUCCOR);
		mce_flags.smca = !!cpu_has(c, X86_FEATURE_SMCA);

		/*
		* Install proper ops for Scalable MCA enabled processors
		*/
		if (mce_flags.smca) {
		msr_ops.ctl = smca_ctl_reg;
		msr_ops.status = smca_status_reg;
		msr_ops.addr = smca_addr_reg;
		msr_ops.misc = smca_misc_reg;
		}
		mce_amd_feature_init(c);
		}
		}

		static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
		{
		switch (c->x86_vendor) {
		case X86_VENDOR_INTEL:
		mce_intel_feature_init(c);
		mce_adjust_timer = cmci_intel_adjust_timer;
		break;

		case X86_VENDOR_AMD: {
		mce_amd_feature_init(c);
		break;
		}

		@@ -1812,6 +1817,7 @@ void mcheck_cpu_init(struct cpuinfo_x86 *c)

		machine_check_vector = do_machine_check;

		__mcheck_cpu_init_early(c);
		__mcheck_cpu_init_generic();
		__mcheck_cpu_init_vendor(c);
		__mcheck_cpu_init_clear_banks();

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