Commit 51f2e4eb authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
Browse files

staging: comedi: ni_tio_internal: export {read, write)_register() 



Move these inline functions out of the header and export them instead.
These functions have pretty generic names, rename them.

Fix the checkpatch.pl issues:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
CHECK: Avoid crashing the kernel - try using WARN_ON & recovery code
       rather than BUG() or BUG_ON()

Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 73b2d136

drivers/staging/comedi/drivers/ni_tio.c

+49 −23
Original line number Diff line number Diff line
@@ -179,11 +179,38 @@ static bool ni_tio_has_gate2_registers(const struct ni_gpct_device *counter_dev) 
	}

}



/**

 * ni_tio_write() - Write a TIO register using the driver provided callback.

 * @counter: struct ni_gpct counter.

 * @value: the value to write

 * @reg: the register to write.

 */

void ni_tio_write(struct ni_gpct *counter, unsigned int value,

		  enum ni_gpct_register reg)

{

	if (reg < NITIO_NUM_REGS)

		counter->counter_dev->write_register(counter, value, reg);

}

EXPORT_SYMBOL_GPL(ni_tio_write);



/**

 * ni_tio_read() - Read a TIO register using the driver provided callback.

 * @counter: struct ni_gpct counter.

 * @reg: the register to read.

 */

unsigned int ni_tio_read(struct ni_gpct *counter, enum ni_gpct_register reg)

{

	if (reg < NITIO_NUM_REGS)

		return counter->counter_dev->read_register(counter, reg);

	return 0;

}

EXPORT_SYMBOL_GPL(ni_tio_read);



static void ni_tio_reset_count_and_disarm(struct ni_gpct *counter)

{

	unsigned cidx = counter->counter_index;



	write_register(counter, GI_RESET(cidx), NITIO_RESET_REG(cidx));

	ni_tio_write(counter, GI_RESET(cidx), NITIO_RESET_REG(cidx));

}



static uint64_t ni_tio_clock_period_ps(const struct ni_gpct *counter,
@@ -240,8 +267,7 @@ static void ni_tio_set_bits_transient(struct ni_gpct *counter, 
		spin_lock_irqsave(&counter_dev->regs_lock, flags);

		counter_dev->regs[reg] &= ~mask;

		counter_dev->regs[reg] |= (value & mask);

		write_register(counter, counter_dev->regs[reg] | transient,

			       reg);

		ni_tio_write(counter, counter_dev->regs[reg] | transient, reg);

		mmiowb();

		spin_unlock_irqrestore(&counter_dev->regs_lock, flags);

	}
@@ -736,7 +762,7 @@ static void ni_tio_set_source_subselect(struct ni_gpct *counter, 
	default:

		return;

	}

	write_register(counter, counter_dev->regs[second_gate_reg],

	ni_tio_write(counter, counter_dev->regs[second_gate_reg],

		     second_gate_reg);

}
@@ -925,7 +951,7 @@ static int ni_660x_set_gate2(struct ni_gpct *counter, unsigned int gate_source) 
	counter_dev->regs[gate2_reg] |= GI_GATE2_MODE;

	counter_dev->regs[gate2_reg] &= ~GI_GATE2_SEL_MASK;

	counter_dev->regs[gate2_reg] |= GI_GATE2_SEL(gate2_sel);

	write_register(counter, counter_dev->regs[gate2_reg], gate2_reg);

	ni_tio_write(counter, counter_dev->regs[gate2_reg], gate2_reg);

	return 0;

}
@@ -949,7 +975,7 @@ static int ni_m_set_gate2(struct ni_gpct *counter, unsigned int gate_source) 
	counter_dev->regs[gate2_reg] |= GI_GATE2_MODE;

	counter_dev->regs[gate2_reg] &= ~GI_GATE2_SEL_MASK;

	counter_dev->regs[gate2_reg] |= GI_GATE2_SEL(gate2_sel);

	write_register(counter, counter_dev->regs[gate2_reg], gate2_reg);

	ni_tio_write(counter, counter_dev->regs[gate2_reg], gate2_reg);

	return 0;

}
@@ -994,7 +1020,7 @@ int ni_tio_set_gate_src(struct ni_gpct *counter, 


		if (chan == NI_GPCT_DISABLED_GATE_SELECT) {

			counter_dev->regs[gate2_reg] &= ~GI_GATE2_MODE;

			write_register(counter, counter_dev->regs[gate2_reg],

			ni_tio_write(counter, counter_dev->regs[gate2_reg],

				     gate2_reg);

			return 0;

		}
@@ -1049,7 +1075,7 @@ static int ni_tio_set_other_src(struct ni_gpct *counter, unsigned index, 


	counter_dev->regs[abz_reg] &= ~mask;

	counter_dev->regs[abz_reg] |= (source << shift) & mask;

	write_register(counter, counter_dev->regs[abz_reg], abz_reg);

	ni_tio_write(counter, counter_dev->regs[abz_reg], abz_reg);

	return 0;

}
@@ -1248,7 +1274,7 @@ int ni_tio_insn_config(struct comedi_device *dev, 
		return 0;

	case INSN_CONFIG_GET_COUNTER_STATUS:

		data[1] = 0;

		status = read_register(counter, NITIO_SHARED_STATUS_REG(cidx));

		status = ni_tio_read(counter, NITIO_SHARED_STATUS_REG(cidx));

		if (status & GI_ARMED(cidx)) {

			data[1] |= COMEDI_COUNTER_ARMED;

			if (status & GI_COUNTING(cidx))
@@ -1297,9 +1323,9 @@ static unsigned int ni_tio_read_sw_save_reg(struct comedi_device *dev, 
	 * will be correct since the count value will definitely have latched

	 * by then.

	 */

	val = read_register(counter, NITIO_SW_SAVE_REG(cidx));

	if (val != read_register(counter, NITIO_SW_SAVE_REG(cidx)))

		val = read_register(counter, NITIO_SW_SAVE_REG(cidx));

	val = ni_tio_read(counter, NITIO_SW_SAVE_REG(cidx));

	if (val != ni_tio_read(counter, NITIO_SW_SAVE_REG(cidx)))

		val = ni_tio_read(counter, NITIO_SW_SAVE_REG(cidx));



	return val;

}
@@ -1336,7 +1362,7 @@ static unsigned ni_tio_next_load_register(struct ni_gpct *counter) 
{

	unsigned cidx = counter->counter_index;

	const unsigned bits =

		read_register(counter, NITIO_SHARED_STATUS_REG(cidx));

		ni_tio_read(counter, NITIO_SHARED_STATUS_REG(cidx));



	return (bits & GI_NEXT_LOAD_SRC(cidx))

			? NITIO_LOADB_REG(cidx)
@@ -1368,19 +1394,19 @@ int ni_tio_insn_write(struct comedi_device *dev, 
		 * load register is already selected.

		 */

		load_reg = ni_tio_next_load_register(counter);

		write_register(counter, data[0], load_reg);

		ni_tio_write(counter, data[0], load_reg);

		ni_tio_set_bits_transient(counter, NITIO_CMD_REG(cidx),

					  0, 0, GI_LOAD);

		/* restore load reg */

		write_register(counter, counter_dev->regs[load_reg], load_reg);

		ni_tio_write(counter, counter_dev->regs[load_reg], load_reg);

		break;

	case 1:

		counter_dev->regs[NITIO_LOADA_REG(cidx)] = data[0];

		write_register(counter, data[0], NITIO_LOADA_REG(cidx));

		ni_tio_write(counter, data[0], NITIO_LOADA_REG(cidx));

		break;

	case 2:

		counter_dev->regs[NITIO_LOADB_REG(cidx)] = data[0];

		write_register(counter, data[0], NITIO_LOADB_REG(cidx));

		ni_tio_write(counter, data[0], NITIO_LOADB_REG(cidx));

		break;

	default:

		return -EINVAL;
@@ -1398,7 +1424,7 @@ void ni_tio_init_counter(struct ni_gpct *counter) 


	/* initialize counter registers */

	counter_dev->regs[NITIO_AUTO_INC_REG(cidx)] = 0x0;

	write_register(counter, 0x0, NITIO_AUTO_INC_REG(cidx));

	ni_tio_write(counter, 0x0, NITIO_AUTO_INC_REG(cidx));



	ni_tio_set_bits(counter, NITIO_CMD_REG(cidx),

			~0, GI_SYNC_GATE);
@@ -1406,10 +1432,10 @@ void ni_tio_init_counter(struct ni_gpct *counter) 
	ni_tio_set_bits(counter, NITIO_MODE_REG(cidx), ~0, 0);



	counter_dev->regs[NITIO_LOADA_REG(cidx)] = 0x0;

	write_register(counter, 0x0, NITIO_LOADA_REG(cidx));

	ni_tio_write(counter, 0x0, NITIO_LOADA_REG(cidx));



	counter_dev->regs[NITIO_LOADB_REG(cidx)] = 0x0;

	write_register(counter, 0x0, NITIO_LOADB_REG(cidx));

	ni_tio_write(counter, 0x0, NITIO_LOADB_REG(cidx));



	ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), ~0, 0);
@@ -1418,7 +1444,7 @@ void ni_tio_init_counter(struct ni_gpct *counter) 


	if (ni_tio_has_gate2_registers(counter_dev)) {

		counter_dev->regs[NITIO_GATE2_REG(cidx)] = 0x0;

		write_register(counter, 0x0, NITIO_GATE2_REG(cidx));

		ni_tio_write(counter, 0x0, NITIO_GATE2_REG(cidx));

	}



	ni_tio_set_bits(counter, NITIO_DMA_CFG_REG(cidx), ~0, 0x0);

drivers/staging/comedi/drivers/ni_tio_internal.h

+2 −13
Original line number Diff line number Diff line
@@ -160,19 +160,8 @@ 
#define GI_TC_INTERRUPT_ENABLE(x)	(((x) % 2) ? BIT(9) : BIT(6))

#define GI_GATE_INTERRUPT_ENABLE(x)	(((x) % 2) ? BIT(10) : BIT(8))



static inline void write_register(struct ni_gpct *counter, unsigned bits,

				  enum ni_gpct_register reg)

{

	BUG_ON(reg >= NITIO_NUM_REGS);

	counter->counter_dev->write_register(counter, bits, reg);

}



static inline unsigned read_register(struct ni_gpct *counter,

				     enum ni_gpct_register reg)

{

	BUG_ON(reg >= NITIO_NUM_REGS);

	return counter->counter_dev->read_register(counter, reg);

}

void ni_tio_write(struct ni_gpct *, unsigned int value, enum ni_gpct_register);

unsigned int ni_tio_read(struct ni_gpct *, enum ni_gpct_register);



static inline bool

ni_tio_counting_mode_registers_present(const struct ni_gpct_device *counter_dev)

drivers/staging/comedi/drivers/ni_tiocmd.c

+5 −5
Original line number Diff line number Diff line
@@ -342,9 +342,9 @@ static void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, 
					   int *stale_data)

{

	unsigned cidx = counter->counter_index;

	const unsigned short gxx_status = read_register(counter,

	const unsigned short gxx_status = ni_tio_read(counter,

						NITIO_SHARED_STATUS_REG(cidx));

	const unsigned short gi_status = read_register(counter,

	const unsigned short gi_status = ni_tio_read(counter,

						NITIO_STATUS_REG(cidx));

	unsigned ack = 0;
@@ -380,14 +380,14 @@ static void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, 
			ack |= GI_GATE_INTERRUPT_ACK;

	}

	if (ack)

		write_register(counter, ack, NITIO_INT_ACK_REG(cidx));

		ni_tio_write(counter, ack, NITIO_INT_ACK_REG(cidx));

	if (ni_tio_get_soft_copy(counter, NITIO_MODE_REG(cidx)) &

	    GI_LOADING_ON_GATE) {

		if (gxx_status & GI_STALE_DATA(cidx)) {

			if (stale_data)

				*stale_data = 1;

		}

		if (read_register(counter, NITIO_STATUS2_REG(cidx)) &

		if (ni_tio_read(counter, NITIO_STATUS2_REG(cidx)) &

		    GI_PERMANENT_STALE(cidx)) {

			dev_info(counter->counter_dev->dev->class_dev,

				 "%s: Gi_Permanent_Stale_Data detected.\n",
@@ -426,7 +426,7 @@ void ni_tio_handle_interrupt(struct ni_gpct *counter, 
	switch (counter->counter_dev->variant) {

	case ni_gpct_variant_m_series:

	case ni_gpct_variant_660x:

		if (read_register(counter, NITIO_DMA_STATUS_REG(cidx)) &

		if (ni_tio_read(counter, NITIO_DMA_STATUS_REG(cidx)) &

		    GI_DRQ_ERROR) {

			dev_notice(counter->counter_dev->dev->class_dev,

				   "%s: Gi_DRQ_Error detected.\n", __func__);

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