Merge back earlier cpufreq material for v4.4. (51ec005a) · Commits · 戴 / test

drivers/cpufreq/cpufreq_conservative.c

+18 −13

Original line number	Diff line number	Diff line
		@@ -23,6 +23,19 @@

		static DEFINE_PER_CPU(struct cs_cpu_dbs_info_s, cs_cpu_dbs_info);

		static int cs_cpufreq_governor_dbs(struct cpufreq_policy *policy,
		unsigned int event);

		#ifndef CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE
		static
		#endif
		struct cpufreq_governor cpufreq_gov_conservative = {
		.name = "conservative",
		.governor = cs_cpufreq_governor_dbs,
		.max_transition_latency = TRANSITION_LATENCY_LIMIT,
		.owner = THIS_MODULE,
		};

		static inline unsigned int get_freq_target(struct cs_dbs_tuners *cs_tuners,
		struct cpufreq_policy *policy)
		{
		@@ -119,12 +132,14 @@ static int dbs_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
		struct cpufreq_freqs *freq = data;
		struct cs_cpu_dbs_info_s *dbs_info =
		&per_cpu(cs_cpu_dbs_info, freq->cpu);
		struct cpufreq_policy *policy;
		struct cpufreq_policy *policy = cpufreq_cpu_get_raw(freq->cpu);

		if (!dbs_info->enable)
		if (!policy)
		return 0;

		policy = dbs_info->cdbs.shared->policy;
		/* policy isn't governed by conservative governor */
		if (policy->governor != &cpufreq_gov_conservative)
		return 0;

		/*
		* we only care if our internally tracked freq moves outside the 'valid'
		@@ -367,16 +382,6 @@ static int cs_cpufreq_governor_dbs(struct cpufreq_policy *policy,
		return cpufreq_governor_dbs(policy, &cs_dbs_cdata, event);
		}

		#ifndef CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE
		static
		#endif
		struct cpufreq_governor cpufreq_gov_conservative = {
		.name = "conservative",
		.governor = cs_cpufreq_governor_dbs,
		.max_transition_latency = TRANSITION_LATENCY_LIMIT,
		.owner = THIS_MODULE,
		};

		static int __init cpufreq_gov_dbs_init(void)
		{
		return cpufreq_register_governor(&cpufreq_gov_conservative);

drivers/cpufreq/cpufreq_governor.c

+1 −11

Original line number	Diff line number	Diff line
		@@ -463,7 +463,6 @@ static int cpufreq_governor_start(struct cpufreq_policy *policy,
		cdata->get_cpu_dbs_info_s(cpu);

		cs_dbs_info->down_skip = 0;
		cs_dbs_info->enable = 1;
		cs_dbs_info->requested_freq = policy->cur;
		} else {
		struct od_ops *od_ops = cdata->gov_ops;
		@@ -482,9 +481,7 @@ static int cpufreq_governor_start(struct cpufreq_policy *policy,
		static int cpufreq_governor_stop(struct cpufreq_policy *policy,
		struct dbs_data *dbs_data)
		{
		struct common_dbs_data *cdata = dbs_data->cdata;
		unsigned int cpu = policy->cpu;
		struct cpu_dbs_info *cdbs = cdata->get_cpu_cdbs(cpu);
		struct cpu_dbs_info *cdbs = dbs_data->cdata->get_cpu_cdbs(policy->cpu);
		struct cpu_common_dbs_info *shared = cdbs->shared;

		/* State should be equivalent to START */
		@@ -493,13 +490,6 @@ static int cpufreq_governor_stop(struct cpufreq_policy *policy,

		gov_cancel_work(dbs_data, policy);

		if (cdata->governor == GOV_CONSERVATIVE) {
		struct cs_cpu_dbs_info_s *cs_dbs_info =
		cdata->get_cpu_dbs_info_s(cpu);

		cs_dbs_info->enable = 0;
		}

		shared->policy = NULL;
		mutex_destroy(&shared->timer_mutex);
		return 0;

drivers/cpufreq/cpufreq_governor.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -170,7 +170,6 @@ struct cs_cpu_dbs_info_s {
		struct cpu_dbs_info cdbs;
		unsigned int down_skip;
		unsigned int requested_freq;
		unsigned int enable:1;
		};

		/* Per policy Governors sysfs tunables */

drivers/cpufreq/imx6q-cpufreq.c

+45 −5

Original line number	Diff line number	Diff line
		@@ -30,6 +30,10 @@ static struct clk *pll1_sw_clk;
		static struct clk *step_clk;
		static struct clk *pll2_pfd2_396m_clk;

		/* clk used by i.MX6UL */
		static struct clk *pll2_bus_clk;
		static struct clk *secondary_sel_clk;

		static struct device *cpu_dev;
		static bool free_opp;
		static struct cpufreq_frequency_table *freq_table;
		@@ -91,17 +95,37 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
		* The setpoints are selected per PLL/PDF frequencies, so we need to
		* reprogram PLL for frequency scaling. The procedure of reprogramming
		* PLL1 is as below.
		*
		* For i.MX6UL, it has a secondary clk mux, the cpu frequency change
		* flow is slightly different from other i.MX6 OSC.
		* The cpu frequeny change flow for i.MX6(except i.MX6UL) is as below:
		* - Enable pll2_pfd2_396m_clk and reparent pll1_sw_clk to it
		* - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it
		* - Disable pll2_pfd2_396m_clk
		*/
		if (of_machine_is_compatible("fsl,imx6ul")) {
		/*
		* When changing pll1_sw_clk's parent to pll1_sys_clk,
		* CPU may run at higher than 528MHz, this will lead to
		* the system unstable if the voltage is lower than the
		* voltage of 528MHz, so lower the CPU frequency to one
		* half before changing CPU frequency.
		*/
		clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
		clk_set_parent(pll1_sw_clk, pll1_sys_clk);
		if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk))
		clk_set_parent(secondary_sel_clk, pll2_bus_clk);
		else
		clk_set_parent(secondary_sel_clk, pll2_pfd2_396m_clk);
		clk_set_parent(step_clk, secondary_sel_clk);
		clk_set_parent(pll1_sw_clk, step_clk);
		} else {
		clk_set_parent(step_clk, pll2_pfd2_396m_clk);
		clk_set_parent(pll1_sw_clk, step_clk);
		if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk)) {
		clk_set_rate(pll1_sys_clk, new_freq * 1000);
		clk_set_parent(pll1_sw_clk, pll1_sys_clk);
		}
		}

		/* Ensure the arm clock divider is what we expect */
		ret = clk_set_rate(arm_clk, new_freq * 1000);
		@@ -186,6 +210,16 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
		goto put_clk;
		}

		if (of_machine_is_compatible("fsl,imx6ul")) {
		pll2_bus_clk = clk_get(cpu_dev, "pll2_bus");
		secondary_sel_clk = clk_get(cpu_dev, "secondary_sel");
		if (IS_ERR(pll2_bus_clk) \|\| IS_ERR(secondary_sel_clk)) {
		dev_err(cpu_dev, "failed to get clocks specific to imx6ul\n");
		ret = -ENOENT;
		goto put_clk;
		}
		}

		arm_reg = regulator_get(cpu_dev, "arm");
		pu_reg = regulator_get_optional(cpu_dev, "pu");
		soc_reg = regulator_get(cpu_dev, "soc");
		@@ -331,6 +365,10 @@ put_clk:
		clk_put(step_clk);
		if (!IS_ERR(pll2_pfd2_396m_clk))
		clk_put(pll2_pfd2_396m_clk);
		if (!IS_ERR(pll2_bus_clk))
		clk_put(pll2_bus_clk);
		if (!IS_ERR(secondary_sel_clk))
		clk_put(secondary_sel_clk);
		of_node_put(np);
		return ret;
		}
		@@ -350,6 +388,8 @@ static int imx6q_cpufreq_remove(struct platform_device *pdev)
		clk_put(pll1_sw_clk);
		clk_put(step_clk);
		clk_put(pll2_pfd2_396m_clk);
		clk_put(pll2_bus_clk);
		clk_put(secondary_sel_clk);

		return 0;
		}

drivers/cpufreq/integrator-cpufreq.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -221,6 +221,8 @@ static const struct of_device_id integrator_cpufreq_match[] = {
		{ },
		};

		MODULE_DEVICE_TABLE(of, integrator_cpufreq_match);

		static struct platform_driver integrator_cpufreq_driver = {
		.driver = {
		.name = "integrator-cpufreq",

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