Commit 51ea46e8 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-arm-dt-for-v4.21' of... 

Merge tag 'renesas-arm-dt-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.21

* RZ/N1D (r9a06g032) SoC:
  - Correct GIC DT node name
  - Enable pin controller

* RZ/G1C (r8a77470) iWave g23S single board computer
  - Add QSPI flash support
  - Add pinctl support for EtherAVB
  - Enable CMT0 (Renesas R-Car Compare Match Timer)
  - Enable RWDT (Renesas Watchdog Timer)
  - Enable uSD and eMMC support

* RZ/G1C (r8a77470) SoC:
  - Describe USB-DMAC and I2C devices in DT

* R-Mobile A1 (r8a7740), Emma Mobile EV2 (emev2) and
  SH-Mobile AG5 (sh72a0) SoCs:
  - Include SoC name in DTSI

* R-Car H2 (r8a7790) based lager, and
  R-Car M2-W (r8a7791) based koelsch and porter boards:
  - Disable unconnected LVDS encoders

* tag 'renesas-arm-dt-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

:
  ARM: dts: r9a06g032: Correct the GIC DT node name
  ARM: dts: iwg23s-sbc: Add QSPI flash support
  ARM: dts: r8a77470: Add QSPI support
  ARM: dts: iwg23s-sbc: Add pinctl support for EtherAVB
  ARM: dts: iwg23s-sbc: Enable cmt0
  ARM: dts: r8a77470: Add CMT SoC specific support
  ARM: dts: r8a77470: Add USB-DMAC device nodes
  ARM: dts: iwg23s-sbc: Enable watchdog support
  ARM: dts: r8a77470: Add watchdog support to SoC dtsi
  ARM: dts: r8a7740, emev2, sh73a0: Include SoC name in DTSI
  ARM: dts: r8a779[01]: Disable unconnected LVDS encoders
  ARM: dts: iwg23s-sbc: Add uSD and eMMC support
  ARM: dts: r8a77470: Add SDHI1 support
  ARM: dts: r8a77470: Add SDHI0 support
  ARM: dts: r8a77470: Add I2C[0123] support
  ARM: dts: r9a06g032: Add pinctrl node

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 42d76db9 673df60a

arch/arm/boot/dts/emev2.dtsi

+1 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Device Tree Source for the EMEV2 SoC

 * Device Tree Source for the Emma Mobile EV2 SoC

 *

 * Copyright (C) 2012 Renesas Solutions Corp.

 */

arch/arm/boot/dts/r8a7740.dtsi

+1 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Device Tree Source for the r8a7740 SoC

 * Device Tree Source for the R-Mobile A1 (R8A77400) SoC

 *

 * Copyright (C) 2012 Renesas Solutions Corp.

 */

arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts

+119 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
 */



/dts-v1/;

#include <dt-bindings/gpio/gpio.h>

#include "r8a77470.dtsi"

/ {

	model = "iWave iW-RainboW-G23S single board computer based on RZ/G1C";
@@ -25,9 +26,43 @@ 
		device_type = "memory";

		reg = <0 0x40000000 0 0x20000000>;

	};



	reg_1p8v: reg-1p8v {

		compatible = "regulator-fixed";

		regulator-name = "fixed-1.8V";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		regulator-boot-on;

		regulator-always-on;

	};



	reg_3p3v: reg-3p3v {

		compatible = "regulator-fixed";

		regulator-name = "fixed-3.3V";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-boot-on;

		regulator-always-on;

	};



	vccq_sdhi2: regulator-vccq-sdhi2 {

		compatible = "regulator-gpio";



		regulator-name = "SDHI2 VccQ";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;



		gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;

		gpios-states = <1>;

		states = <3300000 1

			  1800000 0>;

	};

};



&avb {

	pinctrl-0 = <&avb_pins>;

	pinctrl-names = "default";



	phy-handle = <&phy3>;

	phy-mode = "gmii";

	renesas,no-ether-link;
@@ -41,15 +76,73 @@ 
	};

};



&cmt0 {

	status = "okay";

};



&extal_clk {

	clock-frequency = <20000000>;

};



&pfc {

	avb_pins: avb {

		groups = "avb_mdio", "avb_gmii_tx_rx";

		function = "avb";

	};



	mmc_pins_uhs: mmc_uhs {

		groups = "mmc_data8", "mmc_ctrl";

		function = "mmc";

		power-source = <1800>;

	};



	qspi0_pins: qspi0 {

		groups = "qspi0_ctrl", "qspi0_data2";

		function = "qspi0";

	};



	scif1_pins: scif1 {

		groups = "scif1_data_b";

		function = "scif1";

	};



	sdhi2_pins: sd2 {

		groups = "sdhi2_data4", "sdhi2_ctrl";

		function = "sdhi2";

		power-source = <3300>;

	};



	sdhi2_pins_uhs: sd2_uhs {

		groups = "sdhi2_data4", "sdhi2_ctrl";

		function = "sdhi2";

		power-source = <1800>;

	};

};



&qspi0 {

	pinctrl-0 = <&qspi0_pins>;

	pinctrl-names = "default";



	status = "okay";



	/* WARNING - This device contains the bootloader. Handle with care. */

	flash: flash@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "issi,is25lp016d", "jedec,spi-nor";

		reg = <0>;

		spi-max-frequency = <133000000>;

		spi-tx-bus-width = <1>;

		spi-rx-bus-width = <1>;

		m25p,fast-read;

		spi-cpol;

		spi-cpha;

	};

};



&rwdt {

	timeout-sec = <60>;

	status = "okay";

};



&scif1 {
@@ -58,3 +151,29 @@ 


	status = "okay";

};



&sdhi1 {

	pinctrl-0 = <&mmc_pins_uhs>;

	pinctrl-names = "state_uhs";



	vmmc-supply = <&reg_3p3v>;

	vqmmc-supply = <&reg_1p8v>;

	bus-width = <8>;

	mmc-hs200-1_8v;

	non-removable;

	fixed-emmc-driver-type = <1>;

	status = "okay";

};



&sdhi2 {

	pinctrl-0 = <&sdhi2_pins>;

	pinctrl-1 = <&sdhi2_pins_uhs>;

	pinctrl-names = "default", "state_uhs";



	vmmc-supply = <&reg_3p3v>;

	vqmmc-supply = <&vccq_sdhi2>;

	bus-width = <4>;

	cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;

	sd-uhs-sdr50;

	status = "okay";

};

arch/arm/boot/dts/r8a77470.dtsi

+221 −1
Original line number Diff line number Diff line
@@ -14,6 +14,14 @@ 
	#address-cells = <2>;

	#size-cells = <2>;



	aliases {

		i2c0 = &i2c0;

		i2c1 = &i2c1;

		i2c2 = &i2c2;

		i2c3 = &i2c3;

		i2c4 = &i2c4;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -71,6 +79,16 @@ 
		#size-cells = <2>;

		ranges;



		rwdt: watchdog@e6020000 {

			compatible = "renesas,r8a77470-wdt",

				     "renesas,rcar-gen2-wdt";

			reg = <0 0xe6020000 0 0x0c>;

			clocks = <&cpg CPG_MOD 402>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 402>;

			status = "disabled";

		};



		gpio0: gpio@e6050000 {

			compatible = "renesas,gpio-r8a77470",

				     "renesas,rcar-gen2-gpio";
@@ -237,6 +255,62 @@ 
			reg = <0 0xe6300000 0 0x20000>;

		};



		i2c0: i2c@e6508000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a77470",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6508000 0 0x40>;

			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 931>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 931>;

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c1: i2c@e6518000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a77470",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6518000 0 0x40>;

			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 930>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 930>;

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c2: i2c@e6530000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a77470",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6530000 0 0x40>;

			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 929>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 929>;

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c3: i2c@e6540000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a77470",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6540000 0 0x40>;

			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 928>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 928>;

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c4: i2c@e6520000 {

			#address-cells = <1>;

			#size-cells = <0>;
@@ -251,6 +325,62 @@ 
			status = "disabled";

		};



		usb_dmac00: dma-controller@e65a0000 {

			compatible = "renesas,r8a77470-usb-dmac",

				     "renesas,usb-dmac";

			reg = <0 0xe65a0000 0 0x100>;

			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "ch0", "ch1";

			clocks = <&cpg CPG_MOD 330>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 330>;

			#dma-cells = <1>;

			dma-channels = <2>;

		};



		usb_dmac10: dma-controller@e65b0000 {

			compatible = "renesas,r8a77470-usb-dmac",

				     "renesas,usb-dmac";

			reg = <0 0xe65b0000 0 0x100>;

			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "ch0", "ch1";

			clocks = <&cpg CPG_MOD 331>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 331>;

			#dma-cells = <1>;

			dma-channels = <2>;

		};



		usb_dmac01: dma-controller@e65a8000 {

			compatible = "renesas,r8a77470-usb-dmac",

				     "renesas,usb-dmac";

			reg = <0 0xe65a8000 0 0x100>;

			interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "ch0", "ch1";

			clocks = <&cpg CPG_MOD 326>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 326>;

			#dma-cells = <1>;

			dma-channels = <2>;

		};



		usb_dmac11: dma-controller@e65b8000 {

			compatible = "renesas,r8a77470-usb-dmac",

				     "renesas,usb-dmac";

			reg = <0 0xe65b8000 0 0x100>;

			interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "ch0", "ch1";

			clocks = <&cpg CPG_MOD 327>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 327>;

			#dma-cells = <1>;

			dma-channels = <2>;

		};



		dmac0: dma-controller@e6700000 {

			compatible = "renesas,dmac-r8a77470",

				     "renesas,rcar-dmac";
@@ -330,6 +460,38 @@ 
			status = "disabled";

		};



		qspi0: spi@e6b10000 {

			compatible = "renesas,qspi-r8a77470", "renesas,qspi";

			reg = <0 0xe6b10000 0 0x2c>;

			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 918>;

			dmas = <&dmac0 0x17>, <&dmac0 0x18>,

			       <&dmac1 0x17>, <&dmac1 0x18>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			resets = <&cpg 918>;

			status = "disabled";

		};



		qspi1: spi@ee200000 {

			compatible = "renesas,qspi-r8a77470", "renesas,qspi";

			reg = <0 0xee200000 0 0x2c>;

			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 917>;

			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,

			       <&dmac1 0xd1>, <&dmac1 0xd2>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			resets = <&cpg 917>;

			status = "disabled";

		};



		scif0: serial@e6e60000 {

			compatible = "renesas,scif-r8a77470",

				     "renesas,rcar-gen2-scif", "renesas,scif";
@@ -426,6 +588,32 @@ 
			status = "disabled";

		};



		sdhi0: sd@ee100000 {

			compatible = "renesas,sdhi-r8a77470",

				     "renesas,rcar-gen2-sdhi";

			reg = <0 0xee100000 0 0x328>;

			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 314>;

			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,

			       <&dmac1 0xcd>, <&dmac1 0xce>;

			dma-names = "tx", "rx", "tx", "rx";

			max-frequency = <156000000>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 314>;

			status = "disabled";

		};



		sdhi1: sd@ee300000 {

			compatible = "renesas,sdhi-mmc-r8a77470";

			reg = <0 0xee300000 0 0x2000>;

			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 313>;

			max-frequency = <156000000>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 313>;

			status = "disabled";

		};



		sdhi2: sd@ee160000 {

			compatible = "renesas,sdhi-r8a77470",

				     "renesas,rcar-gen2-sdhi";
@@ -435,7 +623,7 @@ 
			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,

			       <&dmac1 0xd3>, <&dmac1 0xd4>;

			dma-names = "tx", "rx", "tx", "rx";

			max-frequency = <97500000>;

			max-frequency = <78000000>;

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 312>;

			status = "disabled";
@@ -459,6 +647,38 @@ 
			compatible = "renesas,prr";

			reg = <0 0xff000044 0 4>;

		};



		cmt0: timer@ffca0000 {

			compatible = "renesas,r8a77470-cmt0",

				     "renesas,rcar-gen2-cmt0";

			reg = <0 0xffca0000 0 0x1004>;

			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 124>;

			clock-names = "fck";

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 124>;

			status = "disabled";

		};



		cmt1: timer@e6130000 {

			compatible = "renesas,r8a77470-cmt1",

				     "renesas,rcar-gen2-cmt1";

			reg = <0 0xe6130000 0 0x1004>;

			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 329>;

			clock-names = "fck";

			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;

			resets = <&cpg 329>;

			status = "disabled";

		};

	};



	timer {

arch/arm/boot/dts/r8a7790-lager.dts

+0 −2
Original line number Diff line number Diff line
@@ -489,8 +489,6 @@ 
};



&lvds1 {

	status = "okay";



	ports {

		port@1 {

			lvds_connector: endpoint {

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