Commit 51c19541 authored by Paul Walmsley's avatar Paul Walmsley
Browse files

OMAP clock: drop RATE_FIXED clock flag 



The RATE_FIXED clock flag is pointless.  In the OMAP1 clock code, it
simply causes the omap1_clk_round_rate() function to return the
current rate of the clock.  omap1_clk_round_rate(), however, should
never be called for a fixed-rate clock, since none of these clocks
have a .round_rate function pointer set in their struct clk records.
Similarly, in the OMAP2+ clock code, the RATE_FIXED flag just causes
the clock code to emit a warning if the OMAP clock maintainer was
foolish enough to add a .round_rate function pointer to a fixed-rate
clock.  "Doctor, it hurts when I pretend that a fixed-rate clock is
rate-changeable."  "Then don't pretend that a fixed-rate clock is
rate-changeable."  It has no functional value.  This patch drops the
RATE_FIXED clock flag, removing it from all clocks that are so marked.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
parent 8c34974a

arch/arm/mach-omap1/clock.c

+1 −4
Original line number Diff line number Diff line 
/*

 *  linux/arch/arm/mach-omap1/clock.c

 *

 *  Copyright (C) 2004 - 2005, 2009 Nokia corporation

 *  Copyright (C) 2004 - 2005, 2009-2010 Nokia Corporation

 *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>

 *

 *  Modified to use omap shared clock framework by
@@ -571,9 +571,6 @@ const struct clkops clkops_uart = { 


long omap1_clk_round_rate(struct clk *clk, unsigned long rate)

{

	if (clk->flags & RATE_FIXED)

		return clk->rate;



	if (clk->round_rate != NULL)

		return clk->round_rate(clk, rate);

arch/arm/mach-omap1/clock_data.c

+9 −16
Original line number Diff line number Diff line 
/*

 *  linux/arch/arm/mach-omap1/clock_data.c

 *

 *  Copyright (C) 2004 - 2005, 2009 Nokia corporation

 *  Copyright (C) 2004 - 2005, 2009-2010 Nokia Corporation

 *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>

 *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc

 *
@@ -31,7 +31,6 @@ 
static struct clk dummy_ck = {

	.name	= "dummy",

	.ops	= &clkops_dummy,

	.flags	= RATE_FIXED,

};



static struct clk ck_ref = {
@@ -389,8 +388,7 @@ static struct uart_clk uart1_16xx = { 
		/* Direct from ULPD, no real parent */

		.parent		= &armper_ck.clk,

		.rate		= 48000000,

		.flags		= RATE_FIXED | ENABLE_REG_32BIT |

				  CLOCK_NO_IDLE_PARENT,

		.flags		= ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,

		.enable_reg	= OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),

		.enable_bit	= 29,

	},
@@ -430,8 +428,7 @@ static struct uart_clk uart3_16xx = { 
		/* Direct from ULPD, no real parent */

		.parent		= &armper_ck.clk,

		.rate		= 48000000,

		.flags		= RATE_FIXED | ENABLE_REG_32BIT |

				  CLOCK_NO_IDLE_PARENT,

		.flags		= ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,

		.enable_reg	= OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),

		.enable_bit	= 31,

	},
@@ -443,7 +440,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ 
	.ops		= &clkops_generic,

	/* Direct from ULPD, no parent */

	.rate		= 6000000,

	.flags		= RATE_FIXED | ENABLE_REG_32BIT,

	.flags		= ENABLE_REG_32BIT,

	.enable_reg	= OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),

	.enable_bit	= USB_MCLK_EN_BIT,

};
@@ -453,7 +450,7 @@ static struct clk usb_hhc_ck1510 = { 
	.ops		= &clkops_generic,

	/* Direct from ULPD, no parent */

	.rate		= 48000000, /* Actually 2 clocks, 12MHz and 48MHz */

	.flags		= RATE_FIXED | ENABLE_REG_32BIT,

	.flags		= ENABLE_REG_32BIT,

	.enable_reg	= OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),

	.enable_bit	= USB_HOST_HHC_UHOST_EN,

};
@@ -464,7 +461,7 @@ static struct clk usb_hhc_ck16xx = { 
	/* Direct from ULPD, no parent */

	.rate		= 48000000,

	/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */

	.flags		= RATE_FIXED | ENABLE_REG_32BIT,

	.flags		= ENABLE_REG_32BIT,

	.enable_reg	= OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */

	.enable_bit	= 8 /* UHOST_EN */,

};
@@ -474,7 +471,6 @@ static struct clk usb_dc_ck = { 
	.ops		= &clkops_generic,

	/* Direct from ULPD, no parent */

	.rate		= 48000000,

	.flags		= RATE_FIXED,

	.enable_reg	= OMAP1_IO_ADDRESS(SOFT_REQ_REG),

	.enable_bit	= 4,

};
@@ -484,7 +480,6 @@ static struct clk usb_dc_ck7xx = { 
	.ops		= &clkops_generic,

	/* Direct from ULPD, no parent */

	.rate		= 48000000,

	.flags		= RATE_FIXED,

	.enable_reg	= OMAP1_IO_ADDRESS(SOFT_REQ_REG),

	.enable_bit	= 8,

};
@@ -494,7 +489,6 @@ static struct clk mclk_1510 = { 
	.ops		= &clkops_generic,

	/* Direct from ULPD, no parent. May be enabled by ext hardware. */

	.rate		= 12000000,

	.flags		= RATE_FIXED,

	.enable_reg	= OMAP1_IO_ADDRESS(SOFT_REQ_REG),

	.enable_bit	= 6,

};
@@ -515,7 +509,6 @@ static struct clk bclk_1510 = { 
	.ops		= &clkops_generic,

	/* Direct from ULPD, no parent. May be enabled by ext hardware. */

	.rate		= 12000000,

	.flags		= RATE_FIXED,

};



static struct clk bclk_16xx = {
@@ -535,7 +528,7 @@ static struct clk mmc1_ck = { 
	/* Functional clock is direct from ULPD, interface clock is ARMPER */

	.parent		= &armper_ck.clk,

	.rate		= 48000000,

	.flags		= RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,

	.flags		= ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,

	.enable_reg	= OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),

	.enable_bit	= 23,

};
@@ -546,7 +539,7 @@ static struct clk mmc2_ck = { 
	/* Functional clock is direct from ULPD, interface clock is ARMPER */

	.parent		= &armper_ck.clk,

	.rate		= 48000000,

	.flags		= RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,

	.flags		= ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,

	.enable_reg	= OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),

	.enable_bit	= 20,

};
@@ -557,7 +550,7 @@ static struct clk mmc3_ck = { 
	/* Functional clock is direct from ULPD, interface clock is ARMPER */

	.parent		= &armper_ck.clk,

	.rate		= 48000000,

	.flags		= RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,

	.flags		= ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,

	.enable_reg	= OMAP1_IO_ADDRESS(SOFT_REQ_REG),

	.enable_bit	= 12,

};

arch/arm/mach-omap2/clkt_clksel.c

+0 −4
Original line number Diff line number Diff line
@@ -258,10 +258,6 @@ long omap2_clk_round_rate(struct clk *clk, unsigned long rate) 
	if (clk->round_rate)

		return clk->round_rate(clk, rate);



	if (clk->flags & RATE_FIXED)

		printk(KERN_ERR "clock: generic omap2_clk_round_rate called "

		       "on fixed-rate clock %s\n", clk->name);



	return clk->rate;

}

arch/arm/mach-omap2/clock2420_data.c

+2 −5
Original line number Diff line number Diff line
@@ -55,7 +55,6 @@ static struct clk func_32k_ck = { 
	.name		= "func_32k_ck",

	.ops		= &clkops_null,

	.rate		= 32000,

	.flags		= RATE_FIXED,

	.clkdm_name	= "wkup_clkdm",

};
@@ -63,7 +62,6 @@ static struct clk secure_32k_ck = { 
	.name		= "secure_32k_ck",

	.ops		= &clkops_null,

	.rate		= 32768,

	.flags		= RATE_FIXED,

	.clkdm_name	= "wkup_clkdm",

};
@@ -88,7 +86,6 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */ 
	.name		= "alt_ck",

	.ops		= &clkops_null,

	.rate		= 54000000,

	.flags		= RATE_FIXED,

	.clkdm_name	= "wkup_clkdm",

};
@@ -134,7 +131,7 @@ static struct clk apll96_ck = { 
	.ops		= &clkops_apll96,

	.parent		= &sys_ck,

	.rate		= 96000000,

	.flags		= RATE_FIXED | ENABLE_ON_INIT,

	.flags		= ENABLE_ON_INIT,

	.clkdm_name	= "wkup_clkdm",

	.enable_reg	= OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),

	.enable_bit	= OMAP24XX_EN_96M_PLL_SHIFT,
@@ -145,7 +142,7 @@ static struct clk apll54_ck = { 
	.ops		= &clkops_apll54,

	.parent		= &sys_ck,

	.rate		= 54000000,

	.flags		= RATE_FIXED | ENABLE_ON_INIT,

	.flags		= ENABLE_ON_INIT,

	.clkdm_name	= "wkup_clkdm",

	.enable_reg	= OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),

	.enable_bit	= OMAP24XX_EN_54M_PLL_SHIFT,

arch/arm/mach-omap2/clock2430_data.c

+2 −5
Original line number Diff line number Diff line
@@ -55,7 +55,6 @@ static struct clk func_32k_ck = { 
	.name		= "func_32k_ck",

	.ops		= &clkops_null,

	.rate		= 32000,

	.flags		= RATE_FIXED,

	.clkdm_name	= "wkup_clkdm",

};
@@ -63,7 +62,6 @@ static struct clk secure_32k_ck = { 
	.name		= "secure_32k_ck",

	.ops		= &clkops_null,

	.rate		= 32768,

	.flags		= RATE_FIXED,

	.clkdm_name	= "wkup_clkdm",

};
@@ -88,7 +86,6 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */ 
	.name		= "alt_ck",

	.ops		= &clkops_null,

	.rate		= 54000000,

	.flags		= RATE_FIXED,

	.clkdm_name	= "wkup_clkdm",

};
@@ -134,7 +131,7 @@ static struct clk apll96_ck = { 
	.ops		= &clkops_apll96,

	.parent		= &sys_ck,

	.rate		= 96000000,

	.flags		= RATE_FIXED | ENABLE_ON_INIT,

	.flags		= ENABLE_ON_INIT,

	.clkdm_name	= "wkup_clkdm",

	.enable_reg	= OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),

	.enable_bit	= OMAP24XX_EN_96M_PLL_SHIFT,
@@ -145,7 +142,7 @@ static struct clk apll54_ck = { 
	.ops		= &clkops_apll54,

	.parent		= &sys_ck,

	.rate		= 54000000,

	.flags		= RATE_FIXED | ENABLE_ON_INIT,

	.flags		= ENABLE_ON_INIT,

	.clkdm_name	= "wkup_clkdm",

	.enable_reg	= OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),

	.enable_bit	= OMAP24XX_EN_54M_PLL_SHIFT,

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