Commit 519d8b1a authored by Tobias Rauter's avatar Tobias Rauter Committed by Herbert Xu
Browse files

crypto: dcp - Added support for Freescale's DCP co-processor 



This patch enables the DCP crypto functionality on imx28.
Currently, only aes-128-cbc is supported.
Moreover, the dcpboot misc-device, which is used by Freescale's
SDK tools and uses a non-software-readable OTP-key, is added.

Changes of v2:
- ring buffer for hardware-descriptors
- use of ablkcipher walk
- OTP key encryption/decryption via misc-device
  (compatible to Freescale-SDK)
- overall cleanup

The DCP is also capable of sha1/sha256 but I won't be able to add
that anytime soon.
Tested with built-in runtime-self-test, tcrypt and openssl via
cryptodev 1.6 on imx28-evk and a custom built imx28-board.

Signed-off-by: default avatarTobias Rauter <tobias.rauter@gmail.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 91dc363a

arch/arm/boot/dts/imx28.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -699,7 +699,7 @@ 
			dcp@80028000 {

				reg = <0x80028000 0x2000>;

				interrupts = <52 53 54>;

				status = "disabled";

				compatible = "fsl-dcp";

			};



			pxp@8002a000 {

drivers/crypto/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -286,6 +286,16 @@ config CRYPTO_DEV_SAHARA 
	  This option enables support for the SAHARA HW crypto accelerator

	  found in some Freescale i.MX chips.



config CRYPTO_DEV_DCP

	tristate "Support for the DCP engine"

	depends on ARCH_MXS && OF

	select CRYPTO_BLKCIPHER

	select CRYPTO_AES

	select CRYPTO_CBC

	help

	  This options enables support for the hardware crypto-acceleration

	  capabilities of the DCP co-processor



config CRYPTO_DEV_S5P

	tristate "Support for Samsung S5PV210 crypto accelerator"

	depends on ARCH_S5PV210

drivers/crypto/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ obj-$(CONFIG_CRYPTO_DEV_OMAP_SHAM) += omap-sham.o 
obj-$(CONFIG_CRYPTO_DEV_OMAP_AES) += omap-aes.o

obj-$(CONFIG_CRYPTO_DEV_PICOXCELL) += picoxcell_crypto.o

obj-$(CONFIG_CRYPTO_DEV_SAHARA) += sahara.o

obj-$(CONFIG_CRYPTO_DEV_DCP) += dcp.o

obj-$(CONFIG_CRYPTO_DEV_S5P) += s5p-sss.o

obj-$(CONFIG_CRYPTO_DEV_TEGRA_AES) += tegra-aes.o

obj-$(CONFIG_CRYPTO_DEV_UX500) += ux500/

drivers/crypto/dcp.c

0 → 100644
+925 −0

File added.

Preview size limit exceeded, changes collapsed.

CRA Git | Maintained and supported by SUSTech CRA and CCSE