dt-bindings: sram: Merge Allwinner SRAM bindings into generic

Allwinner SRAM for smp bringup:

------------------------------------------------

Allwinner's A80 SoC uses part of the secure sram for hotplugging of the

primary core (cpu0). Once the core gets powered up it checks if a magic

value is set at a specific location. If it is then the BROM will jump

to the software entry address, instead of executing a standard boot.

Therefore a reserved section sub-node has to be added to the mmio-sram

declaration.

Note that this is separate from the Allwinner SRAM controller found in

../../sram/sunxi-sram.txt. This SRAM is secure only and not mappable to

any device.

Also there are no "secure-only" properties. The implementation should

check if this SRAM is usable first.

Required sub-node properties:

- compatible : depending on the SoC this should be one of:

		"allwinner,sun9i-a80-smp-sram"

The rest of the properties should follow the generic mmio-sram discription

found in ../../misc/sram.txt

Example:

	sram_b: sram@20000 {

		/* 256 KiB secure SRAM at 0x20000 */

		compatible = "mmio-sram";

		reg = <0x00020000 0x40000>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0x00020000 0x40000>;

		smp-sram@1000 {

			/*

			 * This is checked by BROM to determine if

			 * cpu0 should jump to SMP entry vector

			 */

			compatible = "allwinner,sun9i-a80-smp-sram";

			reg = <0x1000 0x8>;

		};

	};

          Should contain a vendor specific string in the form

          <vendor>,[<device>-]<usage>

        enum:

          - allwinner,sun9i-a80-smp-sram

          - amlogic,meson8-smp-sram

          - amlogic,meson8b-smp-sram

          - renesas,smp-sram

            reg = <0x10080000 0x50>;

        };

    };

  - |

    // Allwinner's A80 SoC uses part of the secure sram for hotplugging of the

    // primary core (cpu0). Once the core gets powered up it checks if a magic

    // value is set at a specific location. If it is then the BROM will jump

    // to the software entry address, instead of executing a standard boot.

    //

    // Also there are no "secure-only" properties. The implementation should

    // check if this SRAM is usable first.

    sram@20000 {

        // 256 KiB secure SRAM at 0x20000

        compatible = "mmio-sram";

        reg = <0x00020000 0x40000>;

        #address-cells = <1>;

        #size-cells = <1>;

        ranges = <0 0x00020000 0x40000>;

        smp-sram@1000 {

            // This is checked by BROM to determine if

            // cpu0 should jump to SMP entry vector

            compatible = "allwinner,sun9i-a80-smp-sram";

            reg = <0x1000 0x8>;

        };

    };