Commit 51658c04 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2019-11-21' of... 

Merge tag 'drm-intel-fixes-2019-11-21' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

- Fix kernel oops on dumb_create ioctl on no crtc situation
- Fix bad ugly colored flash on VLV/CHV related to gamma LUT update
- Fix unity of the frequencies reported on PMU
- Fix kernel oops on set_page_dirty using better locks around it
- Protect the request pointer with RCU to prevent it being freed while we might need still
- Make pool objects read-only
- Restore physical addresses for fb_map to avoid corrupted page table

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191121165339.GA23920@intel.com
parents f824c1b3 71d12262

drivers/gpu/drm/i915/display/intel_atomic.c

+1 −0
Original line number Diff line number Diff line
@@ -201,6 +201,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc) 
	crtc_state->update_wm_post = false;

	crtc_state->fb_changed = false;

	crtc_state->fifo_changed = false;

	crtc_state->preload_luts = false;

	crtc_state->wm.need_postvbl_update = false;

	crtc_state->fb_bits = 0;

	crtc_state->update_planes = 0;

drivers/gpu/drm/i915/display/intel_color.c

+61 −0
Original line number Diff line number Diff line
@@ -990,6 +990,55 @@ void intel_color_commit(const struct intel_crtc_state *crtc_state) 
	dev_priv->display.color_commit(crtc_state);

}



static bool intel_can_preload_luts(const struct intel_crtc_state *new_crtc_state)

{

	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);

	struct intel_atomic_state *state =

		to_intel_atomic_state(new_crtc_state->base.state);

	const struct intel_crtc_state *old_crtc_state =

		intel_atomic_get_old_crtc_state(state, crtc);



	return !old_crtc_state->base.gamma_lut &&

		!old_crtc_state->base.degamma_lut;

}



static bool chv_can_preload_luts(const struct intel_crtc_state *new_crtc_state)

{

	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);

	struct intel_atomic_state *state =

		to_intel_atomic_state(new_crtc_state->base.state);

	const struct intel_crtc_state *old_crtc_state =

		intel_atomic_get_old_crtc_state(state, crtc);



	/*

	 * CGM_PIPE_MODE is itself single buffered. We'd have to

	 * somehow split it out from chv_load_luts() if we wanted

	 * the ability to preload the CGM LUTs/CSC without tearing.

	 */

	if (old_crtc_state->cgm_mode || new_crtc_state->cgm_mode)

		return false;



	return !old_crtc_state->base.gamma_lut;

}



static bool glk_can_preload_luts(const struct intel_crtc_state *new_crtc_state)

{

	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);

	struct intel_atomic_state *state =

		to_intel_atomic_state(new_crtc_state->base.state);

	const struct intel_crtc_state *old_crtc_state =

		intel_atomic_get_old_crtc_state(state, crtc);



	/*

	 * The hardware degamma is active whenever the pipe

	 * CSC is active. Thus even if the old state has no

	 * software degamma we need to avoid clobbering the

	 * linear hardware degamma mid scanout.

	 */

	return !old_crtc_state->csc_enable &&

		!old_crtc_state->base.gamma_lut;

}



int intel_color_check(struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
@@ -1133,6 +1182,8 @@ static int i9xx_color_check(struct intel_crtc_state *crtc_state) 
	if (ret)

		return ret;



	crtc_state->preload_luts = intel_can_preload_luts(crtc_state);



	return 0;

}
@@ -1185,6 +1236,8 @@ static int chv_color_check(struct intel_crtc_state *crtc_state) 
	if (ret)

		return ret;



	crtc_state->preload_luts = chv_can_preload_luts(crtc_state);



	return 0;

}
@@ -1224,6 +1277,8 @@ static int ilk_color_check(struct intel_crtc_state *crtc_state) 
	if (ret)

		return ret;



	crtc_state->preload_luts = intel_can_preload_luts(crtc_state);



	return 0;

}
@@ -1281,6 +1336,8 @@ static int ivb_color_check(struct intel_crtc_state *crtc_state) 
	if (ret)

		return ret;



	crtc_state->preload_luts = intel_can_preload_luts(crtc_state);



	return 0;

}
@@ -1319,6 +1376,8 @@ static int glk_color_check(struct intel_crtc_state *crtc_state) 
	if (ret)

		return ret;



	crtc_state->preload_luts = glk_can_preload_luts(crtc_state);



	return 0;

}
@@ -1368,6 +1427,8 @@ static int icl_color_check(struct intel_crtc_state *crtc_state) 


	crtc_state->csc_mode = icl_csc_mode(crtc_state);



	crtc_state->preload_luts = intel_can_preload_luts(crtc_state);



	return 0;

}

drivers/gpu/drm/i915/display/intel_display.c

+9 −0
Original line number Diff line number Diff line
@@ -2504,6 +2504,9 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv, 
	 * the highest stride limits of them all.

	 */

	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);

	if (!crtc)

		return 0;



	plane = to_intel_plane(crtc->base.primary);



	return plane->max_stride(plane, pixel_format, modifier,
@@ -13740,6 +13743,11 @@ static void intel_update_crtc(struct intel_crtc *crtc, 
		/* vblanks work again, re-enable pipe CRC. */

		intel_crtc_enable_pipe_crc(crtc);

	} else {

		if (new_crtc_state->preload_luts &&

		    (new_crtc_state->base.color_mgmt_changed ||

		     new_crtc_state->update_pipe))

			intel_color_load_luts(new_crtc_state);



		intel_pre_plane_update(old_crtc_state, new_crtc_state);



		if (new_crtc_state->update_pipe)
@@ -14034,6 +14042,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) 
	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

		if (new_crtc_state->base.active &&

		    !needs_modeset(new_crtc_state) &&

		    !new_crtc_state->preload_luts &&

		    (new_crtc_state->base.color_mgmt_changed ||

		     new_crtc_state->update_pipe))

			intel_color_load_luts(new_crtc_state);

drivers/gpu/drm/i915/display/intel_display_types.h

+1 −0
Original line number Diff line number Diff line
@@ -761,6 +761,7 @@ struct intel_crtc_state { 
	bool update_wm_pre, update_wm_post; /* watermarks are updated */

	bool fb_changed; /* fb on any of the planes is changed */

	bool fifo_changed; /* FIFO split is changed */

	bool preload_luts;



	/* Pipe source size (ie. panel fitter input size)

	 * All planes will be positioned inside this space,

drivers/gpu/drm/i915/display/intel_fbdev.c

+5 −4
Original line number Diff line number Diff line
@@ -235,6 +235,11 @@ static int intelfb_create(struct drm_fb_helper *helper, 
	info->apertures->ranges[0].base = ggtt->gmadr.start;

	info->apertures->ranges[0].size = ggtt->mappable_end;



	/* Our framebuffer is the entirety of fbdev's system memory */

	info->fix.smem_start =

		(unsigned long)(ggtt->gmadr.start + vma->node.start);

	info->fix.smem_len = vma->node.size;



	vaddr = i915_vma_pin_iomap(vma);

	if (IS_ERR(vaddr)) {

		DRM_ERROR("Failed to remap framebuffer into virtual memory\n");
@@ -244,10 +249,6 @@ static int intelfb_create(struct drm_fb_helper *helper, 
	info->screen_base = vaddr;

	info->screen_size = vma->node.size;



	/* Our framebuffer is the entirety of fbdev's system memory */

	info->fix.smem_start = (unsigned long)info->screen_base;

	info->fix.smem_len = info->screen_size;



	drm_fb_helper_fill_info(info, &ifbdev->helper, sizes);



	/* If the object is shmemfs backed, it will have given us zeroed pages.

CRA Git | Maintained and supported by SUSTech CRA and CCSE