Commit 515c0340 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Tero Kristo
Browse files

arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss 



Secure proxy (NAVSS0_SEC_PROXY0) and smmu (NAVSS0_TCU) is part of the
Navigator Subsystem.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
parent ab641f28

arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

+21 −22
Original line number Diff line number Diff line
@@ -40,17 +40,6 @@ 
		};

	};



	smmu0: smmu@36600000 {

		compatible = "arm,smmu-v3";

		reg = <0x0 0x36600000 0x0 0x100000>;

		power-domains = <&k3_pds 229 TI_SCI_PD_EXCLUSIVE>;

		interrupt-parent = <&gic500>;

		interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,

			     <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;

		interrupt-names = "eventq", "gerror";

		#iommu-cells = <1>;

	};



	main_gpio_intr: interrupt-controller0 {

		compatible = "ti,sci-intr";

		ti,intr-trigger-type = <1>;
@@ -91,6 +80,27 @@ 
			ti,sci-rm-range-global-event = <0xd>;

		};



		secure_proxy_main: mailbox@32c00000 {

			compatible = "ti,am654-secure-proxy";

			#mbox-cells = <1>;

			reg-names = "target_data", "rt", "scfg";

			reg = <0x00 0x32c00000 0x00 0x100000>,

			      <0x00 0x32400000 0x00 0x100000>,

			      <0x00 0x32800000 0x00 0x100000>;

			interrupt-names = "rx_011";

			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

		};



		smmu0: smmu@36600000 {

			compatible = "arm,smmu-v3";

			reg = <0x0 0x36600000 0x0 0x100000>;

			interrupt-parent = <&gic500>;

			interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,

				     <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "eventq", "gerror";

			#iommu-cells = <1>;

		};



		hwspinlock: spinlock@30e00000 {

			compatible = "ti,am654-hwspinlock";

			reg = <0x00 0x30e00000 0x00 0x1000>;
@@ -206,17 +216,6 @@ 
		};

	};



	secure_proxy_main: mailbox@32c00000 {

		compatible = "ti,am654-secure-proxy";

		#mbox-cells = <1>;

		reg-names = "target_data", "rt", "scfg";

		reg = <0x00 0x32c00000 0x00 0x100000>,

		      <0x00 0x32400000 0x00 0x100000>,

		      <0x00 0x32800000 0x00 0x100000>;

		interrupt-names = "rx_011";

		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

	};



	main_pmx0: pinmux@11c000 {

		compatible = "pinctrl-single";

		/* Proxy 0 addressing */

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