Unverified Commit 51522217 authored by Jiaxun Yang's avatar Jiaxun Yang Committed by Paul Burton
Browse files

MIPS: Loongson64: Bump ISA level to MIPSR2



Despite early sample of Loongson-3A1000, the whole Loongson64 family have
implemented all the features required by MIPS64 Release2. Thus we decide to
bump the ISA option to R2.

Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: chenhc@lemote.com
Cc: paul.burton@mips.com
Cc: linux-kernel@vger.kernel.org
parent ba9196d2
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+4 −2
Original line number Diff line number Diff line
@@ -1436,10 +1436,14 @@ config CPU_LOONGSON64
	bool "Loongson 64-bit CPU"
	depends on SYS_HAS_CPU_LOONGSON64
	select ARCH_HAS_PHYS_TO_DMA
	select CPU_MIPSR2
	select CPU_HAS_PREFETCH
	select CPU_SUPPORTS_64BIT_KERNEL
	select CPU_SUPPORTS_HIGHMEM
	select CPU_SUPPORTS_HUGEPAGES
	select CPU_SUPPORTS_MSA
	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
	select CPU_MIPSR2_IRQ_VI
	select WEAK_ORDERING
	select WEAK_REORDERING_BEYOND_LLSC
	select MIPS_ASID_BITS_VARIABLE
@@ -1457,8 +1461,6 @@ config CPU_LOONGSON64
config LOONGSON3_ENHANCEMENT
	bool "New Loongson-3 CPU Enhancements"
	default n
	select CPU_MIPSR2
	select CPU_HAS_PREFETCH
	depends on CPU_LOONGSON64
	help
	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
+2 −2
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@
 * TLB hazards
 */
#if (defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)) && \
	!defined(CONFIG_CPU_CAVIUM_OCTEON) && !defined(CONFIG_LOONGSON3_ENHANCEMENT)
	!defined(CONFIG_CPU_CAVIUM_OCTEON) && !defined(CONFIG_CPU_LOONGSON64)

/*
 * MIPSR2 defines ehb for hazard avoidance
@@ -158,7 +158,7 @@ do { \
} while (0)

#elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
	defined(CONFIG_CPU_LOONGSON2EF) || defined(CONFIG_LOONGSON3_ENHANCEMENT) || \
	defined(CONFIG_CPU_LOONGSON2EF) || defined(CONFIG_CPU_LOONGSON64) || \
	defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_XLR)

/*