KVM: X86: Emulate MSR_IA32_MISC_ENABLE MWAIT bit (511a8556) · Commits · 戴 / test

MSR IA32_MISC_ENABLE bit 18, according to SDM: | When this bit is set to 0, the MONITOR feature flag is not set (CPUID.01H:ECX[bit 3] = 0). | This indicates that MONITOR/MWAIT are not supported. | | Software attempts to execute MONITOR/MWAIT will cause #UD when this bit is 0. | | When this bit is set to 1 (default), MONITOR/MWAIT are supported (CPUID.01H:ECX[bit 3] = 1). The CPUID.01H:ECX[bit 3] ought to mirror the value of the MSR bit, CPUID.01H:ECX[bit 3] is a better guard than kvm_mwait_in_guest(). kvm_mwait_in_guest() affects the behavior of MONITOR/MWAIT, not its guest visibility. This patch implements toggling of the CPUID bit based on guest writes to the MSR. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Sean Christopherson <sean.j.christopherson@intel.com> Cc: Liran Alon <liran.alon@oracle.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by:

Wanpeng Li <wanpengli@tencent.com> [Fixes for backwards compatibility - Paolo] Signed-off-by:

Paolo Bonzini <pbonzini@redhat.com>

arch/x86/include/uapi/asm/kvm.h

+5 −4

Original line number	Diff line number	Diff line
		@@ -382,6 +382,7 @@ struct kvm_sync_regs {
		#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
		#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
		#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
		#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)

		#define KVM_STATE_NESTED_GUEST_MODE 0x00000001
		#define KVM_STATE_NESTED_RUN_PENDING 0x00000002

arch/x86/kvm/cpuid.c

+10 −0

Original line number	Diff line number	Diff line
		@@ -137,6 +137,16 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)
		(best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
		best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);

		if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) {
		best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
		if (best) {
		if (vcpu->arch.ia32_misc_enable_msr & MSR_IA32_MISC_ENABLE_MWAIT)
		best->ecx \|= F(MWAIT);
		else
		best->ecx &= ~F(MWAIT);
		}
		}

		/* Update physical-address width */
		vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
		kvm_mmu_reset_context(vcpu);

arch/x86/kvm/x86.c

+9 −1

Original line number	Diff line number	Diff line
		@@ -2547,7 +2547,15 @@ int kvm_set_msr_common(struct kvm_vcpu vcpu, struct msr_data msr_info)
		}
		break;
		case MSR_IA32_MISC_ENABLE:
		if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
		((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
		if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
		return 1;
		vcpu->arch.ia32_misc_enable_msr = data;
		kvm_update_cpuid(vcpu);
		} else {
		vcpu->arch.ia32_misc_enable_msr = data;
		}
		break;
		case MSR_IA32_SMBASE:
		if (!msr_info->host_initiated)

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