Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma

Optional properties:

  - dma-coherent      : Present if dma operations are coherent

  - #dma-cells: must be <1>. used to represent the number of integer

    cells in the dmas property of client device.

  - dma-channels: contains the total number of DMA channels supported by the DMAC

  - dma-requests: contains the total number of DMA requests supported by the DMAC

Example:

		compatible = "arm,pl330", "arm,primecell";

		reg = <0x12680000 0x1000>;

		interrupts = <99>;

		#dma-cells = <1>;

		#dma-channels = <8>;

		#dma-requests = <32>;

	};

Client drivers (device nodes requiring dma transfers from dev-to-mem or

mem-to-dev) should specify the DMA channel numbers using a two-value pair

mem-to-dev) should specify the DMA channel numbers and dma channel names

as shown below.

  [property name]  = <[phandle of the dma controller] [dma request id]>;

  [property name]  = <[dma channel name]>

      where 'dma request id' is the dma request number which is connected

      to the client controller. The 'property name' is recommended to be

      of the form <name>-dma-channel.

      to the client controller. The 'property name' 'dmas' and 'dma-names'

      as required by the generic dma device tree binding helpers. The dma

      names correspond 1:1 with the dma request ids in the dmas property.

  Example:  tx-dma-channel = <&pdma0 12>;

  Example:  dmas = <&pdma0 12

		    &pdma1 11>;

	    dma-names = "tx", "rx";

* Generic DMA Controller and DMA request bindings

Generic binding to provide a way for a driver using DMA Engine to retrieve the

DMA request or channel information that goes from a hardware device to a DMA

controller.

* DMA controller

Required property:

- #dma-cells: 		Must be at least 1. Used to provide DMA controller

			specific information. See DMA client binding below for

			more details.

Optional properties:

- dma-channels: 	Number of DMA channels supported by the controller.

- dma-requests: 	Number of DMA requests signals supported by the

			controller.

Example:

	dma: dma@48000000 {

		compatible = "ti,omap-sdma";

		reg = <0x48000000 0x1000>;

		interrupts = <0 12 0x4

			      0 13 0x4

			      0 14 0x4

			      0 15 0x4>;

		#dma-cells = <1>;

		dma-channels = <32>;

		dma-requests = <127>;

	};

* DMA client

Client drivers should specify the DMA property using a phandle to the controller

followed by DMA controller specific data.

Required property:

- dmas:			List of one or more DMA specifiers, each consisting of

			- A phandle pointing to DMA controller node

			- A number of integer cells, as determined by the

			  #dma-cells property in the node referenced by phandle

			  containing DMA controller specific information. This

			  typically contains a DMA request line number or a

			  channel number, but can contain any data that is used

			  required for configuring a channel.

- dma-names: 		Contains one identifier string for each DMA specifier in

			the dmas property. The specific strings that can be used

			are defined in the binding of the DMA client device.

			Multiple DMA specifiers can be used to represent

			alternatives and in this case the dma-names for those

			DMA specifiers must be identical (see examples).

Examples:

1. A device with one DMA read channel, one DMA write channel:

	i2c1: i2c@1 {

		...

		dmas = <&dma 2		/* read channel */

			&dma 3>;	/* write channel */

		dma-names = "rx", "tx";

		...

	};

2. A single read-write channel with three alternative DMA controllers:

	dmas = <&dma1 5

		&dma2 7

		&dma3 2>;

	dma-names = "rx-tx", "rx-tx", "rx-tx";

3. A device with three channels, one of which has two alternatives:

	dmas = <&dma1 2			/* read channel */

		&dma1 3			/* write channel */

		&dma2 0			/* error read */

		&dma3 0>;		/* alternative error read */

	dma-names = "rx", "tx", "error", "error";

- interrupt-parent: Should be the phandle for the interrupt controller

  that services interrupts for this device

- interrupt: Should contain the DMAC interrupt number

- nr_channels: Number of channels supported by hardware

- is_private: The device channels should be marked as private and not for by the

  general purpose DMA channel allocator. False if not passed.

- chan_allocation_order: order of allocation of channel, 0 (default): ascending,

  1: descending

- chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1:

  increase from chan n->0

- block_size: Maximum block size supported by the controller

- nr_masters: Number of AHB masters supported by the controller

- data_width: Maximum data width supported by hardware per AHB master

  (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)

- slave_info:

	- bus_id: name of this device channel, not just a device name since

	  devices may have more than one channel e.g. "foo_tx". For using the

	  dw_generic_filter(), slave drivers must pass exactly this string as

	  param to filter function.

	- cfg_hi: Platform-specific initializer for the CFG_HI register

	- cfg_lo: Platform-specific initializer for the CFG_LO register

	- src_master: src master for transfers on allocated channel.

	- dst_master: dest master for transfers on allocated channel.

Example:

		reg = <0xfc000000 0x1000>;

		interrupt-parent = <&vic1>;

		interrupts = <12>;

		nr_channels = <8>;

		chan_allocation_order = <1>;

		chan_priority = <1>;

		block_size = <0xfff>;

		nr_masters = <2>;

		data_width = <3 3 0 0>;

		slave_info {

			uart0-tx {

				bus_id = "uart0-tx";

				cfg_hi = <0x4000>;	/* 0x8 << 11 */

				cfg_lo = <0>;

				src_master = <0>;

				dst_master = <1>;

			};

			spi0-tx {

				bus_id = "spi0-tx";

				cfg_hi = <0x2000>;	/* 0x4 << 11 */

				cfg_lo = <0>;

				src_master = <0>;

				dst_master = <0>;

			};

		};

	};

			compatible = "arm,pl330", "arm,primecell";

			reg = <0x121A0000 0x1000>;

			interrupts = <0 34 0>;

			#dma-cells = <1>;

			#dma-channels = <8>;

			#dma-requests = <32>;

		};

		pdma1: pdma@121B0000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0x121B0000 0x1000>;

			interrupts = <0 35 0>;

			#dma-cells = <1>;

			#dma-channels = <8>;

			#dma-requests = <32>;

		};

		mdma0: mdma@10800000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0x10800000 0x1000>;

			interrupts = <0 33 0>;

			#dma-cells = <1>;

			#dma-channels = <8>;

			#dma-requests = <1>;

		};

		mdma1: mdma@11C10000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0x11C10000 0x1000>;

			interrupts = <0 124 0>;

			#dma-cells = <1>;

			#dma-channels = <8>;

			#dma-requests = <1>;

		};

	};

#include <linux/clk.h>

#include <linux/err.h>

#include <linux/io.h>

#include <linux/amba/pl080.h>

#include <mach/dma.h>

#include <mach/map.h>

#include <mach/irqs.h>

#include <asm/hardware/pl080.h>

#include "regs-sys.h"

/* dma channel state information */