Commit 507c93a2 authored by Chris Brandt's avatar Chris Brandt Committed by Geert Uytterhoeven
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clk: renesas: r7s9210: Add SDHI clocks 



Add SDHI clocks for RZ/A2

Signed-off-by: default avatarChris Brandt <chris.brandt@renesas.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 65102238

drivers/clk/renesas/r7s9210-cpg-mssr.c

+5 −0
Original line number Diff line number Diff line
@@ -98,6 +98,11 @@ static const struct mssr_mod_clk r7s9210_mod_clks[] __initconst = { 
	DEF_MOD_STB("spi2",	 95,	R7S9210_CLK_P1),

	DEF_MOD_STB("spi1",	 96,	R7S9210_CLK_P1),

	DEF_MOD_STB("spi0",	 97,	R7S9210_CLK_P1),



	DEF_MOD_STB("sdhi11",	100,	R7S9210_CLK_B),

	DEF_MOD_STB("sdhi10",	101,	R7S9210_CLK_B),

	DEF_MOD_STB("sdhi01",	102,	R7S9210_CLK_B),

	DEF_MOD_STB("sdhi00",	103,	R7S9210_CLK_B),

};



/* The clock dividers in the table vary based on DT and register settings */

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