Commit 504d4721 authored by John Crispin's avatar John Crispin Committed by Ralf Baechle
Browse files

MIPS: Lantiq: Add ethernet driver 



This patch adds the driver for the ETOP Packet Processing Engine (PPE32)
found inside the XWAY family of Lantiq MIPS SoCs. This driver makes 100MBit
ethernet work. Support for all 8 dma channels, gbit and the embedded switch
found on the ar9/vr9 still needs to be implemented.

Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Signed-off-by: default avatarRalph Hempel <ralph.hempel@lantiq.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2357/


Acked-by: default avatarDavid S. Miller <davem@davemloft.net>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent dfec1a82

arch/mips/include/asm/mach-lantiq/lantiq_platform.h

+7 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#define _LANTIQ_PLATFORM_H__



#include <linux/mtd/partitions.h>

#include <linux/socket.h>



/* struct used to pass info to the pci core */

enum {
@@ -43,4 +44,10 @@ struct ltq_pci_data { 
	int irq[16];

};



/* struct used to pass info to network drivers */

struct ltq_eth_data {

	struct sockaddr mac;

	int mii_mode;

};



#endif

arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h

+2 −2
Original line number Diff line number Diff line
@@ -82,8 +82,8 @@ 
#define PMU_SWITCH		0x10000000



/* ETOP - ethernet */

#define LTQ_PPE32_BASE_ADDR	0xBE180000

#define LTQ_PPE32_SIZE		0x40000

#define LTQ_ETOP_BASE_ADDR	0x1E180000

#define LTQ_ETOP_SIZE		0x40000



/* DMA */

#define LTQ_DMA_BASE_ADDR	0x1E104100

arch/mips/lantiq/xway/devices.c

+23 −0
Original line number Diff line number Diff line
@@ -96,3 +96,26 @@ void __init ltq_register_ase_asc(void) 
	platform_device_register_simple("ltq_asc", 0,

		ltq_ase_asc_resources, ARRAY_SIZE(ltq_ase_asc_resources));

}



/* ethernet */

static struct resource ltq_etop_resources = {

	.name	= "etop",

	.start	= LTQ_ETOP_BASE_ADDR,

	.end	= LTQ_ETOP_BASE_ADDR + LTQ_ETOP_SIZE - 1,

	.flags	= IORESOURCE_MEM,

};



static struct platform_device ltq_etop = {

	.name		= "ltq_etop",

	.resource	= &ltq_etop_resources,

	.num_resources	= 1,

};



void __init

ltq_register_etop(struct ltq_eth_data *eth)

{

	if (eth) {

		ltq_etop.dev.platform_data = eth;

		platform_device_register(&ltq_etop);

	}

}

arch/mips/lantiq/xway/devices.h

+1 −0
Original line number Diff line number Diff line
@@ -15,5 +15,6 @@ 
extern void ltq_register_gpio(void);

extern void ltq_register_gpio_stp(void);

extern void ltq_register_ase_asc(void);

extern void ltq_register_etop(struct ltq_eth_data *eth);



#endif

drivers/net/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -2017,6 +2017,13 @@ config FTMAC100 
	  from Faraday. It is used on Faraday A320, Andes AG101 and some

	  other ARM/NDS32 SoC's.



config LANTIQ_ETOP

	tristate "Lantiq SoC ETOP driver"

	depends on SOC_TYPE_XWAY

	help

	  Support for the MII0 inside the Lantiq SoC





source "drivers/net/fs_enet/Kconfig"



source "drivers/net/octeon/Kconfig"

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