Commit 4fbe112a authored Feb 24, 2020 by Chris Wilson

drm/i915/gtt: Downgrade gen7 (ivb, byt, hsw) back to aliasing-ppgtt

Full-ppgtt on gen7 is proving to be highly unstable and not robust.

Closes: https://gitlab.freedesktop.org/drm/intel/issues/694


Fixes: 3cd6e886 ("drm/i915/gen7: Re-enable full-ppgtt for ivb & hsw")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Dave Airlie <airlied@redhat.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200224101120.4024481-1-chris@chris-wilson.co.uk

parent df1a5bfc

drivers/gpu/drm/i915/i915_pci.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -437,7 +437,7 @@ static const struct intel_device_info snb_m_gt2_info = {
		.has_rc6 = 1, \
		.has_rc6p = 1, \
		.has_rps = true, \
		.ppgtt_type = INTEL_PPGTT_FULL, \
		.ppgtt_type = INTEL_PPGTT_ALIASING, \
		.ppgtt_size = 31, \
		IVB_PIPE_OFFSETS, \
		IVB_CURSOR_OFFSETS, \
		@@ -494,7 +494,7 @@ static const struct intel_device_info vlv_info = {
		.has_rps = true,
		.display.has_gmch = 1,
		.display.has_hotplug = 1,
		.ppgtt_type = INTEL_PPGTT_FULL,
		.ppgtt_type = INTEL_PPGTT_ALIASING,
		.ppgtt_size = 31,
		.has_snoop = true,
		.has_coherent_ggtt = false,

Admin message