Commit 4efea85f authored by Ricardo Neri's avatar Ricardo Neri Committed by Thomas Gleixner
Browse files

x86/insn-eval: Add function to get default params of code segment 



Obtain the default values of the address and operand sizes as specified in
the D and L bits of the the segment descriptor selected by the register
CS. The function can be used for both protected and long modes.
For virtual-8086 mode, the default address and operand sizes are always 2
bytes.

The returned parameters are encoded in a signed 8-bit data type. Auxiliar
macros are provided to encode and decode such values.

Improvements-by: default avatarBorislav Petkov <bp@suse.de>
Signed-off-by: default avatarRicardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarBorislav Petkov <bp@suse.de>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: ricardo.neri@intel.com
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Huang Rui <ray.huang@amd.com>
Cc: Qiaowei Ren <qiaowei.ren@intel.com>
Cc: Shuah Khan <shuah@kernel.org>
Cc: Kees Cook <keescook@chromium.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: "Ravi V. Shankar" <ravi.v.shankar@intel.com>
Cc: Chris Metcalf <cmetcalf@mellanox.com>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Colin Ian King <colin.king@canonical.com>
Cc: Chen Yucong <slaoub@gmail.com>
Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Lorenzo Stoakes <lstoakes@gmail.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Thomas Garnier <thgarnie@google.com>
Link: https://lkml.kernel.org/r/1509135945-13762-17-git-send-email-ricardo.neri-calderon@linux.intel.com
parent bd5a410a

arch/x86/include/asm/insn-eval.h

+5 −0
Original line number Diff line number Diff line
@@ -11,8 +11,13 @@ 
#include <linux/err.h>

#include <asm/ptrace.h>



#define INSN_CODE_SEG_ADDR_SZ(params) ((params >> 4) & 0xf)

#define INSN_CODE_SEG_OPND_SZ(params) (params & 0xf)

#define INSN_CODE_SEG_PARAMS(oper_sz, addr_sz) (oper_sz | (addr_sz << 4))



void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs);

int insn_get_modrm_rm_off(struct insn *insn, struct pt_regs *regs);

unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx);

char insn_get_code_seg_params(struct pt_regs *regs);



#endif /* _ASM_X86_INSN_EVAL_H */

arch/x86/lib/insn-eval.c

+64 −0
Original line number Diff line number Diff line
@@ -639,6 +639,70 @@ static unsigned long get_seg_limit(struct pt_regs *regs, int seg_reg_idx) 
	return limit;

}



/**

 * insn_get_code_seg_params() - Obtain code segment parameters

 * @regs:	Structure with register values as seen when entering kernel mode

 *

 * Obtain address and operand sizes of the code segment. It is obtained from the

 * selector contained in the CS register in regs. In protected mode, the default

 * address is determined by inspecting the L and D bits of the segment

 * descriptor. In virtual-8086 mode, the default is always two bytes for both

 * address and operand sizes.

 *

 * Returns:

 *

 * A signed 8-bit value containing the default parameters on success.

 *

 * -EINVAL on error.

 */

char insn_get_code_seg_params(struct pt_regs *regs)

{

	struct desc_struct *desc;

	short sel;



	if (v8086_mode(regs))

		/* Address and operand size are both 16-bit. */

		return INSN_CODE_SEG_PARAMS(2, 2);



	sel = get_segment_selector(regs, INAT_SEG_REG_CS);

	if (sel < 0)

		return sel;



	desc = get_desc(sel);

	if (!desc)

		return -EINVAL;



	/*

	 * The most significant byte of the Type field of the segment descriptor

	 * determines whether a segment contains data or code. If this is a data

	 * segment, return error.

	 */

	if (!(desc->type & BIT(3)))

		return -EINVAL;



	switch ((desc->l << 1) | desc->d) {

	case 0: /*

		 * Legacy mode. CS.L=0, CS.D=0. Address and operand size are

		 * both 16-bit.

		 */

		return INSN_CODE_SEG_PARAMS(2, 2);

	case 1: /*

		 * Legacy mode. CS.L=0, CS.D=1. Address and operand size are

		 * both 32-bit.

		 */

		return INSN_CODE_SEG_PARAMS(4, 4);

	case 2: /*

		 * IA-32e 64-bit mode. CS.L=1, CS.D=0. Address size is 64-bit;

		 * operand size is 32-bit.

		 */

		return INSN_CODE_SEG_PARAMS(4, 8);

	case 3: /* Invalid setting. CS.L=1, CS.D=1 */

		/* fall through */

	default:

		return -EINVAL;

	}

}



/**

 * insn_get_modrm_rm_off() - Obtain register in r/m part of the ModRM byte

 * @insn:	Instruction containing the ModRM byte

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