Commit 4ef99abd authored by Anusha Srivatsa's avatar Anusha Srivatsa Committed by Paulo Zanoni
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drm/i915/icp: Get/set proper Raw clock frequency on ICP 



Add register definitions for setting the rawclock.
Set the numerator,denominator and divider values.

v2: Simplify the commit message. Simplify the math.
Add  register bits for numerator. (Paulo)
v3 (from Paulo): coding style bikesheds.

Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-5-paulo.r.zanoni@intel.com
parent 0b58436f

drivers/gpu/drm/i915/i915_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -7351,6 +7351,8 @@ enum { 
#define  CNP_RAWCLK_DIV(div)	((div) << 16)

#define  CNP_RAWCLK_FRAC_MASK	(0xf << 26)

#define  CNP_RAWCLK_FRAC(frac)	((frac) << 26)

#define  ICP_RAWCLK_DEN(den)	((den) << 26)

#define  ICP_RAWCLK_NUM(num)	((num) << 11)



#define PCH_DPLL_TMR_CFG        _MMIO(0xc6208)

drivers/gpu/drm/i915/intel_cdclk.c

+27 −2
Original line number Diff line number Diff line
@@ -2343,6 +2343,30 @@ static int cnp_rawclk(struct drm_i915_private *dev_priv) 
	return divider + fraction;

}



static int icp_rawclk(struct drm_i915_private *dev_priv)

{

	u32 rawclk;

	int divider, numerator, denominator, frequency;



	if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {

		frequency = 24000;

		divider = 23;

		numerator = 0;

		denominator = 0;

	} else {

		frequency = 19200;

		divider = 18;

		numerator = 1;

		denominator = 4;

	}



	rawclk = CNP_RAWCLK_DIV(divider) | ICP_RAWCLK_NUM(numerator) |

		 ICP_RAWCLK_DEN(denominator);



	I915_WRITE(PCH_RAWCLK_FREQ, rawclk);

	return frequency;

}



static int pch_rawclk(struct drm_i915_private *dev_priv)

{

	return (I915_READ(PCH_RAWCLK_FREQ) & RAWCLK_FREQ_MASK) * 1000;
@@ -2390,8 +2414,9 @@ static int g4x_hrawclk(struct drm_i915_private *dev_priv) 
 */

void intel_update_rawclk(struct drm_i915_private *dev_priv)

{



	if (HAS_PCH_CNP(dev_priv))

	if (HAS_PCH_ICP(dev_priv))

		dev_priv->rawclk_freq = icp_rawclk(dev_priv);

	else if (HAS_PCH_CNP(dev_priv))

		dev_priv->rawclk_freq = cnp_rawclk(dev_priv);

	else if (HAS_PCH_SPLIT(dev_priv))

		dev_priv->rawclk_freq = pch_rawclk(dev_priv);

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