Commit 4ef1a30c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC late updates from Olof Johansson:
 "This is some material that we picked up into our tree late, or that
  had more complex dependencies on more than one topic branch that makes
  sense to keep separately.

   - TI support for secure accelerators and hwrng on OMAP4/5

   - TI camera changes for dra7 and am437x and SGX improvement due to
     better reset control support on am335x, am437x and dra7

   - Davinci moves to proper clocksource on DM365, and regulator/audio
     improvements for DM365 and DM644x eval boards"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits)
  ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem
  ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt
  ARM: dts: Configure interconnect target module for am437x sgx
  ARM: dts: Configure sgx for dra7
  ARM: dts: Configure rstctrl reset for am335x SGX
  ARM: dts: dra7: Add ti-sysc node for VPE
  ARM: dts: dra7: add vpe clkctrl node
  ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries
  ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries
  ARM: dts: am43xx: add support for clkout1 clock
  arm: dts: dra76-evm: Add CAL and OV5640 nodes
  arm: dtsi: dra76x: Add CAL dtsi node
  arm: dts: dra72-evm-common: Add entries for the CSI2 cameras
  ARM: dts: DRA72: Add CAL dtsi node
  ARM: dts: dra7-l4: Add ti-sysc node for CAM
  ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only
  ARM: dts: dra7: add cam clkctrl node
  ARM: OMAP2+: Drop legacy platform data for omap4 des
  ARM: OMAP2+: Drop legacy platform data for omap4 sham
  ARM: OMAP2+: Drop legacy platform data for omap4 aes
  ...
parents 5939224c a832eb20

arch/arm/boot/dts/am33xx.dtsi

+25 −0
Original line number Diff line number Diff line
@@ -496,6 +496,31 @@ 
				dma-names = "tx", "rx";

			};

		};



		target-module@56000000 {

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0x5600fe00 0x4>,

			      <0x5600fe10 0x4>;

			reg-names = "rev", "sysc";

			ti,sysc-midle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;

			clock-names = "fck";

			resets = <&prm_gfx 0>;

			reset-names = "rstctrl";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x56000000 0x1000000>;



			/*

			 * Closed source PowerVR driver, no child device

			 * binding or driver in mainline

			 */

		};

	};

};

arch/arm/boot/dts/am4372.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -445,6 +445,26 @@ 
				pool;

			};

		};



		target-module@56000000 {

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0x5600fe00 0x4>,

			      <0x5600fe10 0x4>;

			reg-names = "rev", "sysc";

			ti,sysc-midle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			clocks = <&gfx_l3_clkctrl AM4_GFX_L3_GFX_CLKCTRL 0>;

			clock-names = "fck";

			resets = <&prm_gfx 0>;

			reset-names = "rstctrl";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x56000000 0x1000000>;

		};

	};

};

arch/arm/boot/dts/am437x-sk-evm.dts

+26 −1
Original line number Diff line number Diff line
@@ -272,6 +272,12 @@ 
		>;

	};



	clkout1_pin: pinmux_clkout1_pin {

		pinctrl-single,pins = <

			0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* XDMA_EVENT_INTR0/CLKOUT1 */

		>;

	};



	cpsw_default: cpsw_default {

		pinctrl-single,pins = <

			/* Slave 1 */
@@ -593,6 +599,25 @@ 
	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <400000>;



	ov2659@30 {

		compatible = "ovti,ov2659";

		reg = <0x30>;

		pinctrl-names = "default";

		pinctrl-0 = <&clkout1_pin>;



		clocks = <&clkout1_mux_ck>;

		clock-names = "xvclk";

		assigned-clocks = <&clkout1_mux_ck>;

		assigned-clock-parents = <&clkout1_osc_div_ck>;



		port {

			ov2659_1: endpoint {

				remote-endpoint = <&vpfe0_ep>;

				link-frequencies = /bits/ 64 <70000000>;

			};

		};

	};



	edt-ft5306@38 {

		status = "okay";

		compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
@@ -877,7 +902,7 @@ 
	/* Camera port */

	port {

		vpfe0_ep: endpoint {

			/* remote-endpoint = <&sensor>; add once we have it */

			remote-endpoint = <&ov2659_1>;

			ti,am437x-vpfe-interface = <0>;

			bus-width = <8>;

			hsync-active = <0>;

arch/arm/boot/dts/am43x-epos-evm.dts

+22 −1
Original line number Diff line number Diff line
@@ -145,6 +145,12 @@ 
			system-clock-frequency = <12000000>;

		};

	};



	audio_mstrclk: clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <12000000>;

	};

};



&am43xx_pinmux {
@@ -696,6 +702,21 @@ 
		IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */

		DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */

	};



	ov2659@30 {

		compatible = "ovti,ov2659";

		reg = <0x30>;



		clocks = <&audio_mstrclk>;

		clock-names = "xvclk";



		port {

			ov2659_1: endpoint {

				remote-endpoint = <&vpfe1_ep>;

				link-frequencies = /bits/ 64 <70000000>;

			};

		};

	};

};



&i2c2 {
@@ -964,7 +985,7 @@ 


	port {

		vpfe1_ep: endpoint {

			/* remote-endpoint = <&sensor>; add once we have it */

			remote-endpoint = <&ov2659_1>;

			ti,am437x-vpfe-interface = <0>;

			bus-width = <8>;

			hsync-active = <0>;

arch/arm/boot/dts/am43xx-clocks.dtsi

+54 −0
Original line number Diff line number Diff line
@@ -704,6 +704,60 @@ 
		ti,bit-shift = <8>;

		reg = <0x2a48>;

	};



	clkout1_osc_div_ck: clkout1-osc-div-ck {

		#clock-cells = <0>;

		compatible = "ti,divider-clock";

		clocks = <&sys_clkin_ck>;

		ti,bit-shift = <20>;

		ti,max-div = <4>;

		reg = <0x4100>;

	};



	clkout1_src2_mux_ck: clkout1-src2-mux-ck {

		#clock-cells = <0>;

		compatible = "ti,mux-clock";

		clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>,

			 <&dpll_per_m2_ck>, <&dpll_disp_m2_ck>,

			 <&dpll_mpu_m2_ck>;

		reg = <0x4100>;

	};



	clkout1_src2_pre_div_ck: clkout1-src2-pre-div-ck {

		#clock-cells = <0>;

		compatible = "ti,divider-clock";

		clocks = <&clkout1_src2_mux_ck>;

		ti,bit-shift = <4>;

		ti,max-div = <8>;

		reg = <0x4100>;

	};



	clkout1_src2_post_div_ck: clkout1-src2-post-div-ck {

		#clock-cells = <0>;

		compatible = "ti,divider-clock";

		clocks = <&clkout1_src2_pre_div_ck>;

		ti,bit-shift = <8>;

		ti,max-div = <32>;

		ti,index-power-of-two;

		reg = <0x4100>;

	};



	clkout1_mux_ck: clkout1-mux-ck {

		#clock-cells = <0>;

		compatible = "ti,mux-clock";

		clocks = <&clkout1_osc_div_ck>, <&clk_rc32k_ck>,

			 <&clkout1_src2_post_div_ck>, <&dpll_extdev_m2_ck>;

		ti,bit-shift = <16>;

		reg = <0x4100>;

	};



	clkout1_ck: clkout1-ck {

		#clock-cells = <0>;

		compatible = "ti,gate-clock";

		clocks = <&clkout1_mux_ck>;

		ti,bit-shift = <23>;

		reg = <0x4100>;

	};

};



&prcm {

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