Commit 4ee34ea3 authored Feb 24, 2016 by Harvey Hunt Committed by Tejun Heo Feb 25, 2016

libata: Align ata_device's id on a cacheline



The id buffer in ata_device is a DMA target, but it isn't explicitly
cacheline aligned. Due to this, adjacent fields can be overwritten with
stale data from memory on non coherent architectures. As a result, the
kernel is sometimes unable to communicate with an ATA device.

Fix this by ensuring that the id buffer is cacheline aligned.

This issue is similar to that fixed by Commit 84bda12a
("libata: align ap->sector_buf").

Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: <stable@vger.kernel.org> # 2.6.18
Signed-off-by: Tejun Heo <tj@kernel.org>

parent f5bdd66c

include/linux/libata.h

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -720,7 +720,7 @@ struct ata_device {
	union {		union {
	u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */		u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
	u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */		u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */
	};		} ____cacheline_aligned;

	/* DEVSLP Timing Variables from Identify Device Data Log */		/* DEVSLP Timing Variables from Identify Device Data Log */
	u8 devslp_timing[ATA_LOG_DEVSLP_SIZE];		u8 devslp_timing[ATA_LOG_DEVSLP_SIZE];

Admin message