Commit 4ea1636b authored by Andy Lutomirski's avatar Andy Lutomirski Committed by Ingo Molnar
Browse files

x86/asm/tsc: Rename native_read_tsc() to rdtsc() 



Now that there is no paravirt TSC, the "native" is
inappropriate. The function does RDTSC, so give it the obvious
name: rdtsc().

Suggested-by: default avatarBorislav Petkov <bp@suse.de>
Signed-off-by: default avatarAndy Lutomirski <luto@kernel.org>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Huang Rui <ray.huang@amd.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Len Brown <lenb@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kvm ML <kvm@vger.kernel.org>
Link: http://lkml.kernel.org/r/fd43e16281991f096c1e4d21574d9e1402c62d39.1434501121.git.luto@kernel.org


[ Ported it to v4.2-rc1. ]
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent fe47ae6e

arch/x86/boot/compressed/aslr.c

+1 −1
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ static unsigned long get_random_long(void) 


	if (has_cpuflag(X86_FEATURE_TSC)) {

		debug_putstr(" RDTSC");

		raw = native_read_tsc();

		raw = rdtsc();



		random ^= raw;

		use_i8254 = false;

arch/x86/entry/vdso/vclock_gettime.c

+1 −1
Original line number Diff line number Diff line
@@ -186,7 +186,7 @@ notrace static cycle_t vread_tsc(void) 
	 * but no one has ever seen it happen.

	 */

	rdtsc_barrier();

	ret = (cycle_t)native_read_tsc();

	ret = (cycle_t)rdtsc();



	last = gtod->cycle_last;

arch/x86/include/asm/msr.h

+10 −1
Original line number Diff line number Diff line
@@ -109,7 +109,16 @@ notrace static inline int native_write_msr_safe(unsigned int msr, 
extern int rdmsr_safe_regs(u32 regs[8]);

extern int wrmsr_safe_regs(u32 regs[8]);



static __always_inline unsigned long long native_read_tsc(void)

/**

 * rdtsc() - returns the current TSC without ordering constraints

 *

 * rdtsc() returns the result of RDTSC as a 64-bit integer.  The

 * only ordering constraint it supplies is the ordering implied by

 * "asm volatile": it will put the RDTSC in the place you expect.  The

 * CPU can and will speculatively execute that RDTSC, though, so the

 * results can be non-monotonic if compared on different CPUs.

 */

static __always_inline unsigned long long rdtsc(void)

{

	DECLARE_ARGS(val, low, high);

arch/x86/include/asm/pvclock.h

+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ static inline u64 pvclock_scale_delta(u64 delta, u32 mul_frac, int shift) 
static __always_inline

u64 pvclock_get_nsec_offset(const struct pvclock_vcpu_time_info *src)

{

	u64 delta = native_read_tsc() - src->tsc_timestamp;

	u64 delta = rdtsc() - src->tsc_timestamp;

	return pvclock_scale_delta(delta, src->tsc_to_system_mul,

				   src->tsc_shift);

}

arch/x86/include/asm/stackprotector.h

+1 −1
Original line number Diff line number Diff line
@@ -72,7 +72,7 @@ static __always_inline void boot_init_stack_canary(void) 
	 * on during the bootup the random pool has true entropy too.

	 */

	get_random_bytes(&canary, sizeof(canary));

	tsc = native_read_tsc();

	tsc = rdtsc();

	canary += tsc + (tsc << 32UL);



	current->stack_canary = canary;

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