Commit 4e93a658 authored by Jarkko Nikula's avatar Jarkko Nikula Committed by Lee Jones
Browse files

mfd: intel-lpss: Fix Intel Cannon Lake LPSS I2C input clock 



Intel Cannon Lake PCH has much higher 216 MHz input clock to LPSS I2C
than Sunrisepoint which uses 120 MHz. Preliminary information was that
both share the same clock rate but actual silicon implements elevated
rate for better support for 3.4 MHz high-speed I2C.

This incorrect input clock rate results too high I2C bus clock in case
ACPI doesn't provide tuned I2C timing parameters since I2C host
controller driver calculates them from input clock rate.

Fix this by using the correct rate. We still share the same 230 ns SDA
hold time value than Sunrisepoint.

Cc: stable@vger.kernel.org
Fixes: b418bbff ("mfd: intel-lpss: Add Intel Cannonlake PCI IDs")
Reported-by: default avatarJian-Hong Pan <jian-hong@endlessm.com>
Reported-by: default avatarChris Chiu <chiu@endlessm.com>
Reported-by: default avatarDaniel Drake <drake@endlessm.com>
Signed-off-by: default avatarJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: default avatarJian-Hong Pan <jian-hong@endlessm.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
parent 4eb1d7fc

drivers/mfd/intel-lpss-pci.c

+15 −10
Original line number Diff line number Diff line
@@ -124,6 +124,11 @@ static const struct intel_lpss_platform_info apl_i2c_info = { 
	.properties = apl_i2c_properties,

};



static const struct intel_lpss_platform_info cnl_i2c_info = {

	.clk_rate = 216000000,

	.properties = spt_i2c_properties,

};



static const struct pci_device_id intel_lpss_pci_ids[] = {

	/* BXT A-Step */

	{ PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
@@ -207,13 +212,13 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { 
	{ PCI_VDEVICE(INTEL, 0x9daa), (kernel_ulong_t)&spt_info },

	{ PCI_VDEVICE(INTEL, 0x9dab), (kernel_ulong_t)&spt_info },

	{ PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info },

	{ PCI_VDEVICE(INTEL, 0x9dc5), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9dc6), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9dc5), (kernel_ulong_t)&cnl_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9dc6), (kernel_ulong_t)&cnl_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9dc7), (kernel_ulong_t)&spt_uart_info },

	{ PCI_VDEVICE(INTEL, 0x9de8), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9de9), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9de8), (kernel_ulong_t)&cnl_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9de9), (kernel_ulong_t)&cnl_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&cnl_i2c_info },

	{ PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&cnl_i2c_info },

	/* SPT-H */

	{ PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },

	{ PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
@@ -240,10 +245,10 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { 
	{ PCI_VDEVICE(INTEL, 0xa32b), (kernel_ulong_t)&spt_info },

	{ PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&spt_info },

	{ PCI_VDEVICE(INTEL, 0xa347), (kernel_ulong_t)&spt_uart_info },

	{ PCI_VDEVICE(INTEL, 0xa368), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0xa369), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0xa36a), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0xa36b), (kernel_ulong_t)&spt_i2c_info },

	{ PCI_VDEVICE(INTEL, 0xa368), (kernel_ulong_t)&cnl_i2c_info },

	{ PCI_VDEVICE(INTEL, 0xa369), (kernel_ulong_t)&cnl_i2c_info },

	{ PCI_VDEVICE(INTEL, 0xa36a), (kernel_ulong_t)&cnl_i2c_info },

	{ PCI_VDEVICE(INTEL, 0xa36b), (kernel_ulong_t)&cnl_i2c_info },

	{ }

};

MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);

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